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From: WANG Xuerui <kernel@xen0n.name>
To: WANG Xuerui <git@xen0n.name>, linux-mips@vger.kernel.org
Subject: Re: [PATCH v5 0/3] Refactor FTLBPar exception handling and add GSExc handler
Date: Wed, 29 Jul 2020 21:19:41 +0800	[thread overview]
Message-ID: <acd7799f-9d15-067c-cbcd-e425d3ecdda6@xen0n.name> (raw)
In-Reply-To: <20200729131417.4000213-1-git@xen0n.name>

On 2020/7/29 21:14, WANG Xuerui wrote:

> [snip]
>
> v5:
> - Fixed broken build on pre-MIPS32 configs where mfc0 can't have
>   selector, pointed out by Thomas. Build-tested ip22_defconfig.

I accidentally left stray files in git send-email directory, and sent
the cover letter twice. This mail lacked the second change entry for v5,
please see the another cover letter. Sorry for the noise.


      parent reply	other threads:[~2020-07-29 13:19 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-29 13:14 [PATCH v5 0/3] Refactor FTLBPar exception handling and add GSExc handler WANG Xuerui
2020-07-29 13:14 ` WANG Xuerui
2020-07-31 15:57   ` Thomas Bogendoerfer
2020-07-29 13:14 ` [PATCH v5 1/3] MIPS: only register FTLBPar exception handler for supported models WANG Xuerui
2020-07-29 13:14 ` [PATCH v5 2/3] MIPS: add definitions for Loongson-specific CP0.Diag1 register WANG Xuerui
2020-07-29 13:14 ` [PATCH v5 3/3] MIPS: handle Loongson-specific GSExc exception WANG Xuerui
2020-07-29 13:19 ` WANG Xuerui [this message]

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