From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pa0-f47.google.com (mail-pa0-f47.google.com [209.85.220.47]) by kanga.kvack.org (Postfix) with ESMTP id D6DCE6B00AC for ; Fri, 29 May 2015 18:34:17 -0400 (EDT) Received: by pacux9 with SMTP id ux9so27998203pac.3 for ; Fri, 29 May 2015 15:34:17 -0700 (PDT) Received: from mail.zytor.com (terminus.zytor.com. [2001:1868:205::10]) by mx.google.com with ESMTPS id on7si10294783pdb.188.2015.05.29.15.34.16 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 May 2015 15:34:17 -0700 (PDT) In-Reply-To: References: <1432739944-22633-1-git-send-email-toshi.kani@hp.com> <1432739944-22633-13-git-send-email-toshi.kani@hp.com> <20150529091129.GC31435@pd.tnic> <1432911782.23540.55.camel@misato.fc.hp.com> <94D0CD8314A33A4D9D801C0FE68B40295A92F392@G9W0745.americas.hpqcorp.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Subject: Re: [PATCH v10 12/12] drivers/block/pmem: Map NVDIMM with ioremap_wt() From: "H. Peter Anvin" Date: Fri, 29 May 2015 15:32:59 -0700 Message-ID: <126375CE-37E2-4406-B4E8-3C991F02A0C1@zytor.com> Sender: owner-linux-mm@kvack.org List-ID: To: Andy Lutomirski , "Elliott, Robert (Server Storage)" Cc: Dan Williams , "Kani, Toshimitsu" , Borislav Petkov , Ross Zwisler , Thomas Gleixner , Ingo Molnar , Andrew Morton , Arnd Bergmann , "linux-mm@kvack.org" , "linux-kernel@vger.kernel.org" , X86 ML , "linux-nvdimm@lists.01.org" , Juergen Gross , Stefan Bader , Henrique de Moraes Holschuh , Yigal Korman , Konrad Rzeszutek Wilk , Luis Rodriguez , Christoph Hellwig , Matthew Wilcox Nontemporal stores to WB memory is fine in such a way that it doesn't pollute the cache. This can be done by denoting to WC or by forcing cache allocation out of only a subset of the cache. On May 29, 2015 2:46:19 PM PDT, Andy Lutomirski wrote: >On Fri, May 29, 2015 at 2:29 PM, Elliott, Robert (Server Storage) > wrote: >>> -----Original Message----- >>> From: Andy Lutomirski [mailto:luto@amacapital.net] >>> Sent: Friday, May 29, 2015 1:35 PM >> ... >>> Whoa, there! Why would we use non-temporal stores to WB memory to >>> access persistent memory? I can see two reasons not to: >> >> Data written to a block storage device (here, the NVDIMM) is unlikely >> to be read or written again any time soon. It's not like the code >> and data that a program has in memory, where there might be a loop >> accessing the location every CPU clock; it's storage I/O to >> historically very slow (relative to the CPU clock speed) devices. >> The source buffer for that data might be frequently accessed, >> but not the NVDIMM storage itself. >> >> Non-temporal stores avoid wasting cache space on these "one-time" >> accesses. The same applies for reads and non-temporal loads. >> Keep the CPU data cache lines free for the application. >> >> DAX and mmap() do change that; the application is now free to >> store frequently accessed data structures directly in persistent >> memory. But, that's not available if btt is used, and >> application loads and stores won't go through the memcpy() >> calls inside pmem anyway. The non-temporal instructions are >> cache coherent, so data integrity won't get confused by them >> if I/O going through pmem's block storage APIs happens >> to overlap with the application's mmap() regions. >> > >You answered the wrong question. :) I understand the point of the >non-temporal stores -- I don't understand the point of using >non-temporal stores to *WB memory*. I think we should be okay with >having the kernel mapping use WT instead. > >--Andy -- Sent from my mobile phone. Please pardon brevity and lack of formatting. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org