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From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: Jia He <justin.he@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	James Morse <james.morse@arm.com>,
	Matthew Wilcox <willy@infradead.org>,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-mm@kvack.org,
	Punit Agrawal <punitagrawal@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Andrew Morton <akpm@linux-foundation.org>,
	hejianet@gmail.com, Kaly Xin <Kaly.Xin@arm.com>
Subject: Re: [PATCH v10 1/3] arm64: cpufeature: introduce helper cpu_has_hw_af()
Date: Tue, 1 Oct 2019 14:18:48 +0100	[thread overview]
Message-ID: <20191001141848.762296bd@why> (raw)
In-Reply-To: <20191001125446.gknoofnm7az4wqf5@willie-the-truck>

On Tue, 1 Oct 2019 13:54:47 +0100
Will Deacon <will@kernel.org> wrote:

> On Mon, Sep 30, 2019 at 09:57:38AM +0800, Jia He wrote:
> > We unconditionally set the HW_AFDBM capability and only enable it on
> > CPUs which really have the feature. But sometimes we need to know
> > whether this cpu has the capability of HW AF. So decouple AF from
> > DBM by new helper cpu_has_hw_af().
> > 
> > Signed-off-by: Jia He <justin.he@arm.com>
> > Suggested-by: Suzuki Poulose <Suzuki.Poulose@arm.com>
> > Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
> > ---
> >  arch/arm64/include/asm/cpufeature.h | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> > index 9cde5d2e768f..949bc7c85030 100644
> > --- a/arch/arm64/include/asm/cpufeature.h
> > +++ b/arch/arm64/include/asm/cpufeature.h
> > @@ -659,6 +659,16 @@ static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange)
> >  	default: return CONFIG_ARM64_PA_BITS;
> >  	}
> >  }
> > +
> > +/* Check whether hardware update of the Access flag is supported */
> > +static inline bool cpu_has_hw_af(void)
> > +{
> > +	if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM))
> > +		return read_cpuid(ID_AA64MMFR1_EL1) & 0xf;  
> 
> 0xf? I think we should have a mask in sysreg.h for this constant.

We don't have the mask, but we certainly have the shift.

GENMASK(ID_AA64MMFR1_HADBS_SHIFT + 3, ID_AA64MMFR1_HADBS_SHIFT) is a bit
of a mouthful though. Ideally, we'd have a helper for that.

	M.
-- 
Without deviation from the norm, progress is not possible.


  reply	other threads:[~2019-10-01 13:19 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-30  1:57 [PATCH v10 0/3] fix double page fault on arm64 Jia He
2019-09-30  1:57 ` [PATCH v10 1/3] arm64: cpufeature: introduce helper cpu_has_hw_af() Jia He
2019-10-01 12:54   ` Will Deacon
2019-10-01 13:18     ` Marc Zyngier [this message]
2019-10-08  1:12       ` Justin He (Arm Technology China)
2019-10-08 15:32         ` Suzuki K Poulose
2019-10-09  6:29           ` Jia He
2019-09-30  1:57 ` [PATCH v10 2/3] arm64: mm: implement arch_faults_on_old_pte() on arm64 Jia He
2019-10-01 12:50   ` Will Deacon
2019-10-01 13:32     ` Marc Zyngier
2019-10-08  1:55       ` Justin He (Arm Technology China)
2019-10-08  2:30         ` Justin He (Arm Technology China)
2019-10-08  7:46         ` Marc Zyngier
2019-09-30  1:57 ` [PATCH v10 3/3] mm: fix double page fault on arm64 if PTE_AF is cleared Jia He
2019-10-01 12:54   ` Will Deacon
2019-10-08  2:19     ` Justin He (Arm Technology China)
2019-10-08 12:39       ` Will Deacon
2019-10-08 12:58         ` Justin He (Arm Technology China)
2019-10-08 14:32           ` Kirill A. Shutemov
2019-10-16 23:21         ` Palmer Dabbelt
2019-10-16 23:46           ` Will Deacon

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