From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5936C54FCC for ; Tue, 21 Apr 2020 00:06:22 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 7381420B1F for ; Tue, 21 Apr 2020 00:06:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7381420B1F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=goodmis.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 117BC8E0005; Mon, 20 Apr 2020 20:06:22 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 0C9088E0003; Mon, 20 Apr 2020 20:06:22 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id F20888E0005; Mon, 20 Apr 2020 20:06:21 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0110.hostedemail.com [216.40.44.110]) by kanga.kvack.org (Postfix) with ESMTP id D7BC28E0003 for ; Mon, 20 Apr 2020 20:06:21 -0400 (EDT) Received: from smtpin26.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id 8B91D824556B for ; Tue, 21 Apr 2020 00:06:21 +0000 (UTC) X-FDA: 76729920162.26.bean79_5491cf01cff06 X-HE-Tag: bean79_5491cf01cff06 X-Filterd-Recvd-Size: 3536 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by imf02.hostedemail.com (Postfix) with ESMTP for ; Tue, 21 Apr 2020 00:06:21 +0000 (UTC) Received: from oasis.local.home (cpe-66-24-58-225.stny.res.rr.com [66.24.58.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1E69C20782; Tue, 21 Apr 2020 00:06:18 +0000 (UTC) Date: Mon, 20 Apr 2020 20:06:16 -0400 From: Steven Rostedt To: Peter Zijlstra Cc: Zhenyu Ye , mark.rutland@arm.com, will@kernel.org, catalin.marinas@arm.com, aneesh.kumar@linux.ibm.com, akpm@linux-foundation.org, npiggin@gmail.com, arnd@arndb.de, maz@kernel.org, suzuki.poulose@arm.com, tglx@linutronix.de, yuzhao@google.com, Dave.Martin@arm.com, steven.price@arm.com, broonie@kernel.org, guohanjun@huawei.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, arm@kernel.org, xiexiangyou@huawei.com, prime.zeng@hisilicon.com, zhangshaokun@hisilicon.com, kuhn.chenqun@huawei.com Subject: Re: [PATCH v1 6/6] arm64: tlb: Set the TTL field in flush_tlb_range Message-ID: <20200420200616.44c7c7ea@oasis.local.home> In-Reply-To: <20200420121055.GF20696@hirez.programming.kicks-ass.net> References: <20200403090048.938-1-yezhenyu2@huawei.com> <20200403090048.938-7-yezhenyu2@huawei.com> <20200420121055.GF20696@hirez.programming.kicks-ass.net> X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, 20 Apr 2020 14:10:55 +0200 Peter Zijlstra wrote: > On Fri, Apr 03, 2020 at 05:00:48PM +0800, Zhenyu Ye wrote: > > This patch uses the cleared_* in struct mmu_gather to set the > > TTL field in flush_tlb_range(). > > > > Signed-off-by: Zhenyu Ye > > --- > > arch/arm64/include/asm/tlb.h | 26 +++++++++++++++++++++++++- > > arch/arm64/include/asm/tlbflush.h | 14 ++++++++------ > > 2 files changed, 33 insertions(+), 7 deletions(-) > > > > diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h > > index b76df828e6b7..d5ab72eccff4 100644 > > --- a/arch/arm64/include/asm/tlb.h > > +++ b/arch/arm64/include/asm/tlb.h > > @@ -21,11 +21,34 @@ static void tlb_flush(struct mmu_gather *tlb); > > > > #include > > > > +/* > > + * get the tlbi levels in arm64. Default value is 0 if more than one > > + * of cleared_* is set or neither is set. > > + * Arm64 doesn't support p4ds now. > > + */ > > +static inline int tlb_get_level(struct mmu_gather *tlb) > > +{ > > + int sum = tlb->cleared_ptes + tlb->cleared_pmds + > > + tlb->cleared_puds + tlb->cleared_p4ds; > > + > > + if (sum != 1) > > + return 0; > > + else if (tlb->cleared_ptes) > > + return 3; > > + else if (tlb->cleared_pmds) > > + return 2; > > + else if (tlb->cleared_puds) > > + return 1; > > + > > + return 0; > > +} > > That's some mighty wonky code. Please look at the generated asm. Without even looking at the generated asm, if a condition returns, there's no reason to add an else for that condition. if (x) return 1; else if (y) return 2; else return 3; Is exactly the same as: if (x) return 1; if (y) return 2; return 3; -- Steve