From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B852C433E0 for ; Thu, 14 May 2020 17:05:20 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 2B61F2065D for ; Thu, 14 May 2020 17:05:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="MsXf+YHL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2B61F2065D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id CEB70900153; Thu, 14 May 2020 13:05:19 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id C9BA78E0005; Thu, 14 May 2020 13:05:19 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id B8AC9900153; Thu, 14 May 2020 13:05:19 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0228.hostedemail.com [216.40.44.228]) by kanga.kvack.org (Postfix) with ESMTP id 9C5428E0005 for ; Thu, 14 May 2020 13:05:19 -0400 (EDT) Received: from smtpin19.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id 5E5F0180AD807 for ; Thu, 14 May 2020 17:05:19 +0000 (UTC) X-FDA: 76815950358.19.key54_85bb22e356e44 X-HE-Tag: key54_85bb22e356e44 X-Filterd-Recvd-Size: 8726 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by imf02.hostedemail.com (Postfix) with ESMTP for ; Thu, 14 May 2020 17:05:18 +0000 (UTC) Received: from aquarius.haifa.ibm.com (nesher1.haifa.il.ibm.com [195.110.40.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 21FF0206F1; Thu, 14 May 2020 17:05:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1589475918; bh=yCvMg9jE76Q0mBLXp3JtaX9kPYeAaa6ImoilPHaVKJo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MsXf+YHLiMI+6nfVDWOloety14o6JtNlRYn5C4NpDZVRH90TiJvlFuFoUuAZuA9+K HZhIg1NTYiA/9LFiictyIBYEvruIwYzYcqZJyQuCYfPaGccEozO27Q88Ag+LaopJp/ uY8eQCnE5yZhTWiArvI3ABGMenLhVbfIKS966Dkg= From: Mike Rapoport To: linux-kernel@vger.kernel.org Cc: Andrew Morton , Arnd Bergmann , Borislav Petkov , Brian Cain , Catalin Marinas , Chris Zankel , "David S. Miller" , Geert Uytterhoeven , Greentime Hu , Greg Ungerer , Guan Xuetao , Guo Ren , Heiko Carstens , Helge Deller , Ingo Molnar , Ley Foon Tan , Mark Salter , Matthew Wilcox , Matt Turner , Max Filippov , Michael Ellerman , Michal Simek , Mike Rapoport , Nick Hu , Paul Walmsley , Richard Weinberger , Rich Felker , Russell King , Stafford Horne , Thomas Bogendoerfer , Thomas Gleixner , Tony Luck , Vincent Chen , Vineet Gupta , Will Deacon , Yoshinori Sato , linux-alpha@vger.kernel.org, linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-c6x-dev@linux-c6x.org, linux-csky@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, linux-mm@kvack.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, linux-snps-arc@lists.infradead.org, linux-um@lists.infradead.org, linux-xtensa@linux-xtensa.org, openrisc@lists.librecores.org, sparclinux@vger.kernel.org, x86@kernel.org, Mike Rapoport Subject: [PATCH v2 06/12] m68k/mm: move {cache,nocahe}_page() definitions close to their user Date: Thu, 14 May 2020 20:03:21 +0300 Message-Id: <20200514170327.31389-7-rppt@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200514170327.31389-1-rppt@kernel.org> References: <20200514170327.31389-1-rppt@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Mike Rapoport The cache_page() and nocache_page() functions are only used by the motoro= la MMU variant for setting caching attributes for the page table pages. Move the definitions of these functions from arch/m68k/include/asm/motorola_pgtable.h closer to their usage in arch/m68k/mm/motorola.c and drop unused definition in arch/m68k/include/asm/mcf_pgtable.h. Signed-off-by: Mike Rapoport Acked-by: Greg Ungerer --- arch/m68k/include/asm/mcf_pgtable.h | 40 --------------------- arch/m68k/include/asm/motorola_pgtable.h | 44 ------------------------ arch/m68k/mm/motorola.c | 43 +++++++++++++++++++++++ 3 files changed, 43 insertions(+), 84 deletions(-) diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/= mcf_pgtable.h index 0031cd387b75..737e826294f3 100644 --- a/arch/m68k/include/asm/mcf_pgtable.h +++ b/arch/m68k/include/asm/mcf_pgtable.h @@ -328,46 +328,6 @@ extern pgd_t kernel_pg_dir[PTRS_PER_PGD]; #define pte_offset_kernel(dir, address) \ ((pte_t *) __pmd_page(*(dir)) + __pte_offset(address)) =20 -/* - * Disable caching for page at given kernel virtual address. - */ -static inline void nocache_page(void *vaddr) -{ - pgd_t *dir; - p4d_t *p4dp; - pud_t *pudp; - pmd_t *pmdp; - pte_t *ptep; - unsigned long addr =3D (unsigned long) vaddr; - - dir =3D pgd_offset_k(addr); - p4dp =3D p4d_offset(dir, addr); - pudp =3D pud_offset(p4dp, addr); - pmdp =3D pmd_offset(pudp, addr); - ptep =3D pte_offset_kernel(pmdp, addr); - *ptep =3D pte_mknocache(*ptep); -} - -/* - * Enable caching for page at given kernel virtual address. - */ -static inline void cache_page(void *vaddr) -{ - pgd_t *dir; - p4d_t *p4dp; - pud_t *pudp; - pmd_t *pmdp; - pte_t *ptep; - unsigned long addr =3D (unsigned long) vaddr; - - dir =3D pgd_offset_k(addr); - p4dp =3D p4d_offset(dir, addr); - pudp =3D pud_offset(p4dp, addr); - pmdp =3D pmd_offset(pudp, addr); - ptep =3D pte_offset_kernel(pmdp, addr); - *ptep =3D pte_mkcache(*ptep); -} - /* * Encode and de-code a swap entry (must be !pte_none(e) && !pte_present= (e)) */ diff --git a/arch/m68k/include/asm/motorola_pgtable.h b/arch/m68k/include= /asm/motorola_pgtable.h index 9e5a3de21e15..e1594acf7c7e 100644 --- a/arch/m68k/include/asm/motorola_pgtable.h +++ b/arch/m68k/include/asm/motorola_pgtable.h @@ -227,50 +227,6 @@ static inline pte_t *pte_offset_kernel(pmd_t *pmdp, = unsigned long address) #define pte_offset_map(pmdp,address) ((pte_t *)__pmd_page(*pmdp) + (((ad= dress) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) #define pte_unmap(pte) ((void)0) =20 -/* Prior to calling these routines, the page should have been flushed - * from both the cache and ATC, or the CPU might not notice that the - * cache setting for the page has been changed. -jskov - */ -static inline void nocache_page(void *vaddr) -{ - unsigned long addr =3D (unsigned long)vaddr; - - if (CPU_IS_040_OR_060) { - pgd_t *dir; - p4d_t *p4dp; - pud_t *pudp; - pmd_t *pmdp; - pte_t *ptep; - - dir =3D pgd_offset_k(addr); - p4dp =3D p4d_offset(dir, addr); - pudp =3D pud_offset(p4dp, addr); - pmdp =3D pmd_offset(pudp, addr); - ptep =3D pte_offset_kernel(pmdp, addr); - *ptep =3D pte_mknocache(*ptep); - } -} - -static inline void cache_page(void *vaddr) -{ - unsigned long addr =3D (unsigned long)vaddr; - - if (CPU_IS_040_OR_060) { - pgd_t *dir; - p4d_t *p4dp; - pud_t *pudp; - pmd_t *pmdp; - pte_t *ptep; - - dir =3D pgd_offset_k(addr); - p4dp =3D p4d_offset(dir, addr); - pudp =3D pud_offset(p4dp, addr); - pmdp =3D pmd_offset(pudp, addr); - ptep =3D pte_offset_kernel(pmdp, addr); - *ptep =3D pte_mkcache(*ptep); - } -} - /* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present= (e)) */ #define __swp_type(x) (((x).val >> 4) & 0xff) #define __swp_offset(x) ((x).val >> 12) diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c index 904c2a663977..8e5e74121a78 100644 --- a/arch/m68k/mm/motorola.c +++ b/arch/m68k/mm/motorola.c @@ -45,6 +45,49 @@ unsigned long mm_cachebits; EXPORT_SYMBOL(mm_cachebits); #endif =20 +/* Prior to calling these routines, the page should have been flushed + * from both the cache and ATC, or the CPU might not notice that the + * cache setting for the page has been changed. -jskov + */ +static inline void nocache_page(void *vaddr) +{ + unsigned long addr =3D (unsigned long)vaddr; + + if (CPU_IS_040_OR_060) { + pgd_t *dir; + p4d_t *p4dp; + pud_t *pudp; + pmd_t *pmdp; + pte_t *ptep; + + dir =3D pgd_offset_k(addr); + p4dp =3D p4d_offset(dir, addr); + pudp =3D pud_offset(p4dp, addr); + pmdp =3D pmd_offset(pudp, addr); + ptep =3D pte_offset_kernel(pmdp, addr); + *ptep =3D pte_mknocache(*ptep); + } +} + +static inline void cache_page(void *vaddr) +{ + unsigned long addr =3D (unsigned long)vaddr; + + if (CPU_IS_040_OR_060) { + pgd_t *dir; + p4d_t *p4dp; + pud_t *pudp; + pmd_t *pmdp; + pte_t *ptep; + + dir =3D pgd_offset_k(addr); + p4dp =3D p4d_offset(dir, addr); + pudp =3D pud_offset(p4dp, addr); + pmdp =3D pmd_offset(pudp, addr); + ptep =3D pte_offset_kernel(pmdp, addr); + *ptep =3D pte_mkcache(*ptep); + } +} =20 /* * Motorola 680x0 user's manual recommends using uncached memory for add= ress --=20 2.26.2