From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29F9FC4167B for ; Wed, 9 Dec 2020 22:28:18 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id D586E22CB2 for ; Wed, 9 Dec 2020 22:28:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D586E22CB2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 1E2828D007A; Wed, 9 Dec 2020 17:28:15 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 1B47D8D007C; Wed, 9 Dec 2020 17:28:15 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id DB4D28D007A; Wed, 9 Dec 2020 17:28:14 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0152.hostedemail.com [216.40.44.152]) by kanga.kvack.org (Postfix) with ESMTP id A9E318D0076 for ; Wed, 9 Dec 2020 17:28:14 -0500 (EST) Received: from smtpin12.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay02.hostedemail.com (Postfix) with ESMTP id 7139B3622 for ; Wed, 9 Dec 2020 22:28:14 +0000 (UTC) X-FDA: 77575183308.12.mark27_411077a273f3 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin12.hostedemail.com (Postfix) with ESMTP id 4E090180555DE for ; Wed, 9 Dec 2020 22:28:14 +0000 (UTC) X-HE-Tag: mark27_411077a273f3 X-Filterd-Recvd-Size: 5293 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by imf26.hostedemail.com (Postfix) with ESMTP for ; Wed, 9 Dec 2020 22:28:13 +0000 (UTC) IronPort-SDR: WbQGwmhxRIQKs23Hpe0ntNl5/+a0GpAqbU08Tzjv+f7KMFZG3cfBSQ8yB+e5Kxf9R42G93JO6B G3z9ZLlX363A== X-IronPort-AV: E=McAfee;i="6000,8403,9830"; a="161918552" X-IronPort-AV: E=Sophos;i="5.78,407,1599548400"; d="scan'208";a="161918552" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2020 14:28:12 -0800 IronPort-SDR: Tq77sKR9YMDGQOY2b4nEdkdE8fGIpI2EAa8XpG1Gckejh2u8jT1hhEGtHEhb9rgyY9BRaBGTBj chIpoeKORN9g== X-IronPort-AV: E=Sophos;i="5.78,407,1599548400"; d="scan'208";a="364333619" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2020 14:28:11 -0800 From: Yu-cheng Yu To: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu Cc: Yu-cheng Yu Subject: [PATCH v16 3/7] x86/cet/ibt: Handle signals for Indirect Branch Tracking Date: Wed, 9 Dec 2020 14:27:48 -0800 Message-Id: <20201209222752.2911-4-yu-cheng.yu@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20201209222752.2911-1-yu-cheng.yu@intel.com> References: <20201209222752.2911-1-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: When an indirect CALL/JMP instruction is executed and before it reaches the target, it is in 'WAIT_ENDBR' status, which can be read from MSR_IA32_U_CET. The status is part of a task's status before a signal is raised and preserved in the signal frame. It is restored for sigreturn. IBT state machine is described in Intel SDM Vol. 1, Sec. 18.3. Signed-off-by: Yu-cheng Yu --- arch/x86/kernel/cet.c | 27 +++++++++++++++++++++++++-- arch/x86/kernel/fpu/signal.c | 8 +++++--- 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cet.c b/arch/x86/kernel/cet.c index e8871bccce65..d23f68074ab6 100644 --- a/arch/x86/kernel/cet.c +++ b/arch/x86/kernel/cet.c @@ -295,6 +295,13 @@ void cet_restore_signal(struct sc_ext *sc_ext) msr_val |=3D CET_SHSTK_EN; } =20 + if (cet->ibt_enabled) { + msr_val |=3D (CET_ENDBR_EN | CET_NO_TRACK_EN); + + if (sc_ext->wait_endbr) + msr_val |=3D CET_WAIT_ENDBR; + } + if (test_thread_flag(TIF_NEED_FPU_LOAD)) cet_user_state->user_cet =3D msr_val; else @@ -335,9 +342,25 @@ int cet_setup_signal(bool ia32, unsigned long rstor_= addr, struct sc_ext *sc_ext) sc_ext->ssp =3D new_ssp; } =20 - if (ssp) { + if (ssp || cet->ibt_enabled) { + start_update_msrs(); - wrmsrl(MSR_IA32_PL3_SSP, ssp); + + if (ssp) + wrmsrl(MSR_IA32_PL3_SSP, ssp); + + if (cet->ibt_enabled) { + u64 r; + + rdmsrl(MSR_IA32_U_CET, r); + + if (r & CET_WAIT_ENDBR) { + sc_ext->wait_endbr =3D 1; + r &=3D ~CET_WAIT_ENDBR; + wrmsrl(MSR_IA32_U_CET, r); + } + } + end_update_msrs(); } =20 diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index d5d02b34f516..50f28b37e093 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -57,7 +57,8 @@ int save_cet_to_sigframe(int ia32, void __user *fp, uns= igned long restorer) { int err =3D 0; =20 - if (!current->thread.cet.shstk_size) + if (!current->thread.cet.shstk_size && + !current->thread.cet.ibt_enabled) return 0; =20 if (fp) { @@ -89,7 +90,8 @@ static int get_cet_from_sigframe(int ia32, void __user = *fp, struct sc_ext *ext) =20 memset(ext, 0, sizeof(*ext)); =20 - if (!current->thread.cet.shstk_size) + if (!current->thread.cet.shstk_size && + !current->thread.cet.ibt_enabled) return 0; =20 if (fp) { @@ -577,7 +579,7 @@ static unsigned long fpu__alloc_sigcontext_ext(unsign= ed long sp) * sigcontext_ext is at: fpu + fpu_user_xstate_size + * FP_XSTATE_MAGIC2_SIZE, then aligned to 8. */ - if (cet->shstk_size) + if (cet->shstk_size || cet->ibt_enabled) sp -=3D (sizeof(struct sc_ext) + 8); =20 return sp; --=20 2.21.0