tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 9317f948b0b188b8d2fded75957e6d42c460df1b commit: bd06731ef42b0b0fb321a06c182ffd83029f69f5 [12693/13311] ubsan: enable for all*config builds config: powerpc-randconfig-r036-20201216 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 71601d2ac9954cb59c443cb3ae442cb106df35d4) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc cross compiling tool for clang build # apt-get install binutils-powerpc-linux-gnu # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=bd06731ef42b0b0fb321a06c182ffd83029f69f5 git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout bd06731ef42b0b0fb321a06c182ffd83029f69f5 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): drivers/ntb/hw/idt/ntb_hw_idt.c:2409:28: warning: format specifies type 'unsigned char' but the argument has type 'int' [-Wformat] "\t%hhu-%hhu.\t", idx, idx + cnt - 1); ~~~~ ^~~~~~~~~~~~~ %d drivers/ntb/hw/idt/ntb_hw_idt.c:2438:29: warning: format specifies type 'unsigned char' but the argument has type 'int' [-Wformat] "\t%hhu-%hhu.\t", idx, idx + cnt - 1); ~~~~ ^~~~~~~~~~~~~ %d drivers/ntb/hw/idt/ntb_hw_idt.c:2484:15: warning: format specifies type 'unsigned char' but the argument has type 'int' [-Wformat] idx, data, src, ndev->peers[src].port); ^~~ >> drivers/ntb/hw/idt/ntb_hw_idt.c:1041:27: warning: stack frame size of 1056 bytes in function 'idt_scan_mws' [-Wframe-larger-than=] static struct idt_mw_cfg *idt_scan_mws(struct idt_ntb_dev *ndev, int port, ^ 4 warnings generated. vim +/idt_scan_mws +1041 drivers/ntb/hw/idt/ntb_hw_idt.c bf2a952d31d2cd2 Serge Semin 2017-04-12 1029 bf2a952d31d2cd2 Serge Semin 2017-04-12 1030 /* bf2a952d31d2cd2 Serge Semin 2017-04-12 1031 * idt_scan_mws() - scan memory windows of the port bf2a952d31d2cd2 Serge Semin 2017-04-12 1032 * @ndev: IDT NTB hardware driver descriptor bf2a952d31d2cd2 Serge Semin 2017-04-12 1033 * @port: Port to get number of memory windows for bf2a952d31d2cd2 Serge Semin 2017-04-12 1034 * @mw_cnt: Out - number of memory windows bf2a952d31d2cd2 Serge Semin 2017-04-12 1035 * bf2a952d31d2cd2 Serge Semin 2017-04-12 1036 * It walks over BAR setup registers of the specified port and determines bf2a952d31d2cd2 Serge Semin 2017-04-12 1037 * the memory windows parameters if any activated. bf2a952d31d2cd2 Serge Semin 2017-04-12 1038 * bf2a952d31d2cd2 Serge Semin 2017-04-12 1039 * Return: array of memory windows bf2a952d31d2cd2 Serge Semin 2017-04-12 1040 */ bf2a952d31d2cd2 Serge Semin 2017-04-12 @1041 static struct idt_mw_cfg *idt_scan_mws(struct idt_ntb_dev *ndev, int port, bf2a952d31d2cd2 Serge Semin 2017-04-12 1042 unsigned char *mw_cnt) bf2a952d31d2cd2 Serge Semin 2017-04-12 1043 { bf2a952d31d2cd2 Serge Semin 2017-04-12 1044 struct idt_mw_cfg mws[IDT_MAX_NR_MWS], *ret_mws; bf2a952d31d2cd2 Serge Semin 2017-04-12 1045 const struct idt_ntb_bar *bars; bf2a952d31d2cd2 Serge Semin 2017-04-12 1046 enum idt_mw_type mw_type; bf2a952d31d2cd2 Serge Semin 2017-04-12 1047 unsigned char widx, bidx, en_cnt; bf2a952d31d2cd2 Serge Semin 2017-04-12 1048 bool bar_64bit = false; bf2a952d31d2cd2 Serge Semin 2017-04-12 1049 int aprt_size; bf2a952d31d2cd2 Serge Semin 2017-04-12 1050 u32 data; bf2a952d31d2cd2 Serge Semin 2017-04-12 1051 bf2a952d31d2cd2 Serge Semin 2017-04-12 1052 /* Retrieve the array of the BARs registers */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1053 bars = portdata_tbl[port].bars; bf2a952d31d2cd2 Serge Semin 2017-04-12 1054 bf2a952d31d2cd2 Serge Semin 2017-04-12 1055 /* Scan all the BARs belonging to the port */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1056 *mw_cnt = 0; bf2a952d31d2cd2 Serge Semin 2017-04-12 1057 for (bidx = 0; bidx < IDT_BAR_CNT; bidx += 1 + bar_64bit) { bf2a952d31d2cd2 Serge Semin 2017-04-12 1058 /* Read BARSETUP register value */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1059 data = idt_sw_read(ndev, bars[bidx].setup); bf2a952d31d2cd2 Serge Semin 2017-04-12 1060 bf2a952d31d2cd2 Serge Semin 2017-04-12 1061 /* Skip disabled BARs */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1062 if (!(data & IDT_BARSETUP_EN)) { bf2a952d31d2cd2 Serge Semin 2017-04-12 1063 bar_64bit = false; bf2a952d31d2cd2 Serge Semin 2017-04-12 1064 continue; bf2a952d31d2cd2 Serge Semin 2017-04-12 1065 } bf2a952d31d2cd2 Serge Semin 2017-04-12 1066 bf2a952d31d2cd2 Serge Semin 2017-04-12 1067 /* Skip next BARSETUP if current one has 64bit addressing */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1068 bar_64bit = IS_FLD_SET(BARSETUP_TYPE, data, 64); bf2a952d31d2cd2 Serge Semin 2017-04-12 1069 bf2a952d31d2cd2 Serge Semin 2017-04-12 1070 /* Skip configuration space mapping BARs */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1071 if (data & IDT_BARSETUP_MODE_CFG) bf2a952d31d2cd2 Serge Semin 2017-04-12 1072 continue; bf2a952d31d2cd2 Serge Semin 2017-04-12 1073 bf2a952d31d2cd2 Serge Semin 2017-04-12 1074 /* Retrieve MW type/entries count and aperture size */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1075 mw_type = GET_FIELD(BARSETUP_ATRAN, data); bf2a952d31d2cd2 Serge Semin 2017-04-12 1076 en_cnt = idt_get_mw_count(mw_type); bf2a952d31d2cd2 Serge Semin 2017-04-12 1077 aprt_size = (u64)1 << GET_FIELD(BARSETUP_SIZE, data); bf2a952d31d2cd2 Serge Semin 2017-04-12 1078 bf2a952d31d2cd2 Serge Semin 2017-04-12 1079 /* Save configurations of all available memory windows */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1080 for (widx = 0; widx < en_cnt; widx++, (*mw_cnt)++) { bf2a952d31d2cd2 Serge Semin 2017-04-12 1081 /* bf2a952d31d2cd2 Serge Semin 2017-04-12 1082 * IDT can expose a limited number of MWs, so it's bug bf2a952d31d2cd2 Serge Semin 2017-04-12 1083 * to have more than the driver expects bf2a952d31d2cd2 Serge Semin 2017-04-12 1084 */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1085 if (*mw_cnt >= IDT_MAX_NR_MWS) bf2a952d31d2cd2 Serge Semin 2017-04-12 1086 return ERR_PTR(-EINVAL); bf2a952d31d2cd2 Serge Semin 2017-04-12 1087 bf2a952d31d2cd2 Serge Semin 2017-04-12 1088 /* Save basic MW info */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1089 mws[*mw_cnt].type = mw_type; bf2a952d31d2cd2 Serge Semin 2017-04-12 1090 mws[*mw_cnt].bar = bidx; bf2a952d31d2cd2 Serge Semin 2017-04-12 1091 mws[*mw_cnt].idx = widx; bf2a952d31d2cd2 Serge Semin 2017-04-12 1092 /* It's always DWORD aligned */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1093 mws[*mw_cnt].addr_align = IDT_TRANS_ALIGN; bf2a952d31d2cd2 Serge Semin 2017-04-12 1094 /* DIR and LUT approachs differently configure MWs */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1095 if (mw_type == IDT_MW_DIR) bf2a952d31d2cd2 Serge Semin 2017-04-12 1096 mws[*mw_cnt].size_max = aprt_size; bf2a952d31d2cd2 Serge Semin 2017-04-12 1097 else if (mw_type == IDT_MW_LUT12) bf2a952d31d2cd2 Serge Semin 2017-04-12 1098 mws[*mw_cnt].size_max = aprt_size / 16; bf2a952d31d2cd2 Serge Semin 2017-04-12 1099 else bf2a952d31d2cd2 Serge Semin 2017-04-12 1100 mws[*mw_cnt].size_max = aprt_size / 32; bf2a952d31d2cd2 Serge Semin 2017-04-12 1101 mws[*mw_cnt].size_align = (mw_type == IDT_MW_DIR) ? bf2a952d31d2cd2 Serge Semin 2017-04-12 1102 IDT_DIR_SIZE_ALIGN : mws[*mw_cnt].size_max; bf2a952d31d2cd2 Serge Semin 2017-04-12 1103 } bf2a952d31d2cd2 Serge Semin 2017-04-12 1104 } bf2a952d31d2cd2 Serge Semin 2017-04-12 1105 bf2a952d31d2cd2 Serge Semin 2017-04-12 1106 /* Allocate memory for memory window descriptors */ 1b7619828d0c341 Gustavo A. R. Silva 2018-08-27 1107 ret_mws = devm_kcalloc(&ndev->ntb.pdev->dev, *mw_cnt, sizeof(*ret_mws), 1b7619828d0c341 Gustavo A. R. Silva 2018-08-27 1108 GFP_KERNEL); 1b7619828d0c341 Gustavo A. R. Silva 2018-08-27 1109 if (!ret_mws) bf2a952d31d2cd2 Serge Semin 2017-04-12 1110 return ERR_PTR(-ENOMEM); bf2a952d31d2cd2 Serge Semin 2017-04-12 1111 bf2a952d31d2cd2 Serge Semin 2017-04-12 1112 /* Copy the info of detected memory windows */ bf2a952d31d2cd2 Serge Semin 2017-04-12 1113 memcpy(ret_mws, mws, (*mw_cnt)*sizeof(*ret_mws)); bf2a952d31d2cd2 Serge Semin 2017-04-12 1114 bf2a952d31d2cd2 Serge Semin 2017-04-12 1115 return ret_mws; bf2a952d31d2cd2 Serge Semin 2017-04-12 1116 } bf2a952d31d2cd2 Serge Semin 2017-04-12 1117 :::::: The code at line 1041 was first introduced by commit :::::: bf2a952d31d2cd28bb3454f15645a76fda70addd NTB: Add IDT 89HPESxNTx PCIe-switches support :::::: TO: Serge Semin :::::: CC: Jon Mason --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org