From: Yu-cheng Yu <yu-cheng.yu@intel.com>
To: x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
linux-mm@kvack.org, linux-arch@vger.kernel.org,
linux-api@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
Andy Lutomirski <luto@kernel.org>,
Balbir Singh <bsingharora@gmail.com>,
Borislav Petkov <bp@alien8.de>,
Cyrill Gorcunov <gorcunov@gmail.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Eugene Syromiatnikov <esyr@redhat.com>,
Florian Weimer <fweimer@redhat.com>,
"H.J. Lu" <hjl.tools@gmail.com>, Jann Horn <jannh@google.com>,
Jonathan Corbet <corbet@lwn.net>,
Kees Cook <keescook@chromium.org>,
Mike Kravetz <mike.kravetz@oracle.com>,
Nadav Amit <nadav.amit@gmail.com>,
Oleg Nesterov <oleg@redhat.com>, Pavel Machek <pavel@ucw.cz>,
Peter Zijlstra <peterz@infradead.org>,
Randy Dunlap <rdunlap@infradead.org>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Vedvyas Shanbhogue <vedvyas.shanbhogue@intel.com>,
Dave Martin <Dave.Martin@arm.com>,
Weijiang Yang <weijiang.yang@intel.com>,
Pengfei Xu <pengfei.xu@intel.com>,
Haitao Huang <haitao.huang@intel.com>
Cc: Yu-cheng Yu <yu-cheng.yu@intel.com>
Subject: [PATCH v21 04/26] x86/cpufeatures: Introduce X86_FEATURE_CET and setup functions
Date: Wed, 17 Feb 2021 14:27:08 -0800 [thread overview]
Message-ID: <20210217222730.15819-5-yu-cheng.yu@intel.com> (raw)
In-Reply-To: <20210217222730.15819-1-yu-cheng.yu@intel.com>
Introduce a software-defined X86_FEATURE_CET, which indicates either Shadow
Stack or Indirect Branch Tracking (or both) is present. Also introduce
related cpu init/setup functions.
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
---
arch/x86/include/asm/cpufeatures.h | 2 +-
arch/x86/include/asm/disabled-features.h | 5 ++++-
arch/x86/include/uapi/asm/processor-flags.h | 2 ++
arch/x86/kernel/cpu/common.c | 14 ++++++++++++++
arch/x86/kernel/cpu/intel.c | 3 +++
5 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 292fe87b26b3..d1866659edbd 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -108,7 +108,7 @@
#define X86_FEATURE_EXTD_APICID ( 3*32+26) /* Extended APICID (8 bits) */
#define X86_FEATURE_AMD_DCM ( 3*32+27) /* AMD multi-node processor */
#define X86_FEATURE_APERFMPERF ( 3*32+28) /* P-State hardware coordination feedback capability (APERF/MPERF MSRs) */
-/* free ( 3*32+29) */
+#define X86_FEATURE_CET ( 3*32+29) /* Control-flow enforcement */
#define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */
#define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index a66e7f34b788..ab28dc7b30d0 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -71,9 +71,11 @@
#ifdef CONFIG_X86_CET
#define DISABLE_SHSTK 0
#define DISABLE_IBT 0
+#define DISABLE_CET 0
#else
#define DISABLE_SHSTK (1 << (X86_FEATURE_SHSTK & 31))
#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
+#define DISABLE_CET (1 << (X86_FEATURE_CET & 31))
#endif
/*
@@ -82,7 +84,8 @@
#define DISABLED_MASK0 (DISABLE_VME)
#define DISABLED_MASK1 0
#define DISABLED_MASK2 0
-#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
+#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR| \
+ DISABLE_CET)
#define DISABLED_MASK4 (DISABLE_PCID)
#define DISABLED_MASK5 0
#define DISABLED_MASK6 0
diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h
index bcba3c643e63..a8df907e8017 100644
--- a/arch/x86/include/uapi/asm/processor-flags.h
+++ b/arch/x86/include/uapi/asm/processor-flags.h
@@ -130,6 +130,8 @@
#define X86_CR4_SMAP _BITUL(X86_CR4_SMAP_BIT)
#define X86_CR4_PKE_BIT 22 /* enable Protection Keys support */
#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT)
+#define X86_CR4_CET_BIT 23 /* enable Control-flow Enforcement */
+#define X86_CR4_CET _BITUL(X86_CR4_CET_BIT)
/*
* x86-64 Task Priority Register, CR8
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 35ad8480c464..6cd2d5e119ec 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -510,6 +510,14 @@ static __init int setup_disable_pku(char *arg)
__setup("nopku", setup_disable_pku);
#endif /* CONFIG_X86_64 */
+static __always_inline void setup_cet(struct cpuinfo_x86 *c)
+{
+ if (!cpu_feature_enabled(X86_FEATURE_CET))
+ return;
+
+ cr4_set_bits(X86_CR4_CET);
+}
+
/*
* Some CPU features depend on higher CPUID levels, which may not always
* be available due to CPUID level capping or broken virtualization
@@ -1252,6 +1260,11 @@ static void __init cpu_parse_early_param(void)
if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
setup_clear_cpu_cap(X86_FEATURE_XSAVES);
+ if (cmdline_find_option_bool(boot_command_line, "no_user_shstk"))
+ setup_clear_cpu_cap(X86_FEATURE_SHSTK);
+ if (cmdline_find_option_bool(boot_command_line, "no_user_ibt"))
+ setup_clear_cpu_cap(X86_FEATURE_IBT);
+
arglen = cmdline_find_option(boot_command_line, "clearcpuid", arg, sizeof(arg));
if (arglen <= 0)
return;
@@ -1591,6 +1604,7 @@ static void identify_cpu(struct cpuinfo_x86 *c)
x86_init_rdrand(c);
setup_pku(c);
+ setup_cet(c);
/*
* Clear/Set all flags overridden by options, need do it
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 816fdbec795a..dc762040be05 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -333,6 +333,9 @@ static void early_init_intel(struct cpuinfo_x86 *c)
static void bsp_init_intel(struct cpuinfo_x86 *c)
{
+ if (cpu_has(c, X86_FEATURE_SHSTK) || cpu_has(c, X86_FEATURE_IBT))
+ setup_force_cpu_cap(X86_FEATURE_CET);
+
resctrl_cpu_detect(c);
}
--
2.21.0
next prev parent reply other threads:[~2021-02-17 22:28 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-17 22:27 [PATCH v21 00/26] Control-flow Enforcement: Shadow Stack Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 01/26] Documentation/x86: Add CET description Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 02/26] x86/cet/shstk: Add Kconfig option for user-mode control-flow protection Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 03/26] x86/cpufeatures: Add CET CPU feature flags for Control-flow Enforcement Technology (CET) Yu-cheng Yu
2021-02-17 22:27 ` Yu-cheng Yu [this message]
2021-02-17 22:27 ` [PATCH v21 05/26] x86/fpu/xstate: Introduce CET MSR and XSAVES supervisor states Yu-cheng Yu
2021-02-24 15:34 ` Borislav Petkov
2021-02-24 15:42 ` Yu, Yu-cheng
2021-02-24 15:46 ` Borislav Petkov
2021-02-17 22:27 ` [PATCH v21 06/26] x86/cet: Add control-protection fault handler Yu-cheng Yu
2021-02-24 16:13 ` Borislav Petkov
2021-02-24 16:44 ` Yu, Yu-cheng
2021-02-24 16:53 ` Borislav Petkov
2021-02-24 17:56 ` Yu, Yu-cheng
2021-02-24 19:20 ` Borislav Petkov
2021-02-24 19:30 ` Andy Lutomirski
2021-02-24 19:42 ` Borislav Petkov
2021-02-24 19:52 ` Yu, Yu-cheng
2021-02-17 22:27 ` [PATCH v21 07/26] x86/mm: Remove _PAGE_DIRTY from kernel RO pages Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 08/26] x86/mm: Introduce _PAGE_COW Yu-cheng Yu
2021-03-01 15:52 ` Borislav Petkov
2021-03-01 18:59 ` Yu, Yu-cheng
[not found] ` <167f58a3-20ef-7210-1d66-cf25f4a9bbef@intel.com>
2021-03-03 17:26 ` Borislav Petkov
2021-02-17 22:27 ` [PATCH v21 09/26] drm/i915/gvt: Change _PAGE_DIRTY to _PAGE_DIRTY_BITS Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 10/26] x86/mm: Update pte_modify for _PAGE_COW Yu-cheng Yu
2021-03-05 14:29 ` Borislav Petkov
2021-03-08 16:51 ` Yu, Yu-cheng
2021-02-17 22:27 ` [PATCH v21 11/26] x86/mm: Update ptep_set_wrprotect() and pmdp_set_wrprotect() for transition from _PAGE_DIRTY to _PAGE_COW Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 12/26] mm: Introduce VM_SHSTK for shadow stack memory Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 13/26] x86/mm: Shadow Stack page fault error checking Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 14/26] x86/mm: Update maybe_mkwrite() for shadow stack Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 15/26] mm: Fixup places that call pte_mkwrite() directly Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 16/26] mm: Add guard pages around a shadow stack Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 17/26] mm/mmap: Add shadow stack pages to memory accounting Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 18/26] mm: Update can_follow_write_pte() for shadow stack Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 19/26] mm: Re-introduce vm_flags to do_mmap() Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 20/26] x86/cet/shstk: User-mode shadow stack support Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 21/26] x86/cet/shstk: Handle signals for shadow stack Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 22/26] ELF: Introduce arch_setup_elf_property() Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 23/26] x86/cet/shstk: Handle thread shadow stack Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 24/26] x86/cet/shstk: Add arch_prctl functions for " Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 25/26] mm: Move arch_calc_vm_prot_bits() to arch/x86/include/asm/mman.h Yu-cheng Yu
2021-02-17 22:27 ` [PATCH v21 26/26] mm: Introduce PROT_SHSTK for shadow stack Yu-cheng Yu
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