From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80314C433B4 for ; Fri, 9 Apr 2021 10:12:33 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id D8CF46115B for ; Fri, 9 Apr 2021 10:12:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D8CF46115B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=alien8.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 4D86C6B006C; Fri, 9 Apr 2021 06:12:32 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 488866B006E; Fri, 9 Apr 2021 06:12:32 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 301C76B0070; Fri, 9 Apr 2021 06:12:32 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0171.hostedemail.com [216.40.44.171]) by kanga.kvack.org (Postfix) with ESMTP id 1038A6B006C for ; Fri, 9 Apr 2021 06:12:32 -0400 (EDT) Received: from smtpin36.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay04.hostedemail.com (Postfix) with ESMTP id 823A98E71 for ; Fri, 9 Apr 2021 10:12:31 +0000 (UTC) X-FDA: 78012414102.36.0A1F941 Received: from mail.skyhub.de (unknown [5.9.137.197]) by imf15.hostedemail.com (Postfix) with ESMTP id 10283A0003A0 for ; Fri, 9 Apr 2021 10:12:21 +0000 (UTC) Received: from zn.tnic (p200300ec2f0be10048f842a34b65c796.dip0.t-ipconnect.de [IPv6:2003:ec:2f0b:e100:48f8:42a3:4b65:c796]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 5143E1EC0345; Fri, 9 Apr 2021 12:12:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1617963136; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=koEbuNDmdhGDu2ay8IpM2qYEJm21DVX8eeBWkuWqc2I=; b=JOjOjGo6n8ctViJXkPL+UQEHtj5zYd8rpZrcP+sZezMa1SBathd+X2ZANVtH3ls4n/eoYb VZP38BQpV+Qv7OU47u+1xlbjMsBo1L/PI+lytUBsoMo3U9GugzTZG2nnh/UGDRP3E+/YyZ 9N1soZxem3P3MhhtTg9MdzUnZ0kOe98= Date: Fri, 9 Apr 2021 12:12:14 +0200 From: Borislav Petkov To: Yu-cheng Yu Cc: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang Subject: Re: [PATCH v24 04/30] x86/cpufeatures: Introduce X86_FEATURE_CET and setup functions Message-ID: <20210409101214.GC15567@zn.tnic> References: <20210401221104.31584-1-yu-cheng.yu@intel.com> <20210401221104.31584-5-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20210401221104.31584-5-yu-cheng.yu@intel.com> X-Stat-Signature: tans8jc979ziku4tw9zur7gw1o85s1ao X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 10283A0003A0 Received-SPF: none (alien8.de>: No applicable sender policy available) receiver=imf15; identity=mailfrom; envelope-from=""; helo=mail.skyhub.de; client-ip=5.9.137.197 X-HE-DKIM-Result: pass/pass X-HE-Tag: 1617963141-249075 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Thu, Apr 01, 2021 at 03:10:38PM -0700, Yu-cheng Yu wrote: > Introduce a software-defined X86_FEATURE_CET, which indicates either Shadow > Stack or Indirect Branch Tracking (or both) is present. Also introduce > related cpu init/setup functions. > > Signed-off-by: Yu-cheng Yu > Cc: Kees Cook > --- > v24: > - Update #ifdef placement to reflect Kconfig changes of splitting shadow stack and ibt. > > arch/x86/include/asm/cpufeatures.h | 2 +- > arch/x86/include/asm/disabled-features.h | 9 ++++++++- > arch/x86/include/uapi/asm/processor-flags.h | 2 ++ > arch/x86/kernel/cpu/common.c | 14 ++++++++++++++ > arch/x86/kernel/cpu/intel.c | 3 +++ > 5 files changed, 28 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index bf861fc89fef..d771e62677de 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -108,7 +108,7 @@ > #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* Extended APICID (8 bits) */ > #define X86_FEATURE_AMD_DCM ( 3*32+27) /* AMD multi-node processor */ > #define X86_FEATURE_APERFMPERF ( 3*32+28) /* P-State hardware coordination feedback capability (APERF/MPERF MSRs) */ > -/* free ( 3*32+29) */ > +#define X86_FEATURE_CET ( 3*32+29) /* Control-flow enforcement */ Right, I know we talked about having this synthetic flag but now that we are moving to CONFIG_X86_SHADOW_STACK and separate SHSTK and IBT feature bits, that synthetic flag is not needed anymore. For the cases where you wanna test whether any of the two are present, we're probably better off adding a x86_cet_enabled() helper which tests SHSTK and IBT bits. I haven't gone through the whole thing yet but depending on the context and the fact that AMD doesn't support IBT, that helper might need some tweaking too. I'll see. > #define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */ > #define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */ > > diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h > index e5c6ed9373e8..018cd7acd3e9 100644 > --- a/arch/x86/include/asm/disabled-features.h > +++ b/arch/x86/include/asm/disabled-features.h > @@ -74,13 +74,20 @@ > #define DISABLE_SHSTK (1 << (X86_FEATURE_SHSTK & 31)) > #endif > > +#ifdef CONFIG_X86_CET And you don't need that config item either - AFAICT, you can use CONFIG_X86_SHADOW_STACK everywhere. Which would simplify that config space. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette