From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CF25C432BE for ; Fri, 20 Aug 2021 18:23:16 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 06B166128C for ; Fri, 20 Aug 2021 18:23:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 06B166128C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvack.org Received: by kanga.kvack.org (Postfix) id B23938D0002; Fri, 20 Aug 2021 14:23:12 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id A11536B0074; Fri, 20 Aug 2021 14:23:12 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 88AD06B0075; Fri, 20 Aug 2021 14:23:12 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0157.hostedemail.com [216.40.44.157]) by kanga.kvack.org (Postfix) with ESMTP id 3DBCA6B0073 for ; Fri, 20 Aug 2021 14:23:12 -0400 (EDT) Received: from smtpin13.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id D15CC1801321E for ; Fri, 20 Aug 2021 18:23:11 +0000 (UTC) X-FDA: 78496280982.13.9348337 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by imf16.hostedemail.com (Postfix) with ESMTP id 34E76F00008F for ; Fri, 20 Aug 2021 18:23:10 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10082"; a="216854482" X-IronPort-AV: E=Sophos;i="5.84,338,1620716400"; d="scan'208";a="216854482" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Aug 2021 11:23:08 -0700 X-IronPort-AV: E=Sophos;i="5.84,338,1620716400"; d="scan'208";a="523799156" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Aug 2021 11:23:07 -0700 From: Yu-cheng Yu To: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang , Rick P Edgecombe Cc: Yu-cheng Yu Subject: [PATCH v29 02/10] x86/cet/ibt: Add user-mode Indirect Branch Tracking support Date: Fri, 20 Aug 2021 11:22:37 -0700 Message-Id: <20210820182245.1188-3-yu-cheng.yu@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210820182245.1188-1-yu-cheng.yu@intel.com> References: <20210820182245.1188-1-yu-cheng.yu@intel.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 34E76F00008F Authentication-Results: imf16.hostedemail.com; dkim=none; dmarc=fail reason="No valid SPF, No valid DKIM" header.from=intel.com (policy=none); spf=none (imf16.hostedemail.com: domain of yu-cheng.yu@intel.com has no SPF policy when checking 134.134.136.65) smtp.mailfrom=yu-cheng.yu@intel.com X-Rspamd-Server: rspam04 X-Stat-Signature: fgrhzsin3dg3ao7hbxgupyqgx9at3gc7 X-HE-Tag: 1629483790-462891 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Introduce user-mode Indirect Branch Tracking (IBT) support. Add routines for the setup/disable of IBT. Signed-off-by: Yu-cheng Yu Cc: Kees Cook --- v28: - When IBT feature is not present, make ibt_setup() return success, since this is a setup function. v27: - Change struct thread_shstk: ibt_enabled to ibt. - Create a helper for set/clear bits of MSR_IA32_U_CET. --- arch/x86/include/asm/cet.h | 9 ++++++ arch/x86/kernel/Makefile | 1 + arch/x86/kernel/ibt.c | 58 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 68 insertions(+) create mode 100644 arch/x86/kernel/ibt.c diff --git a/arch/x86/include/asm/cet.h b/arch/x86/include/asm/cet.h index c76a85fbd59f..3dfca29a7c0b 100644 --- a/arch/x86/include/asm/cet.h +++ b/arch/x86/include/asm/cet.h @@ -14,6 +14,7 @@ struct thread_shstk { u64 base; u64 size; u64 locked:1; + u64 ibt:1; }; =20 #ifdef CONFIG_X86_SHADOW_STACK @@ -42,6 +43,14 @@ static inline int setup_signal_shadow_stack(int ia32, = void __user *restorer) { r static inline int restore_signal_shadow_stack(void) { return 0; } #endif =20 +#ifdef CONFIG_X86_IBT +int ibt_setup(void); +void ibt_disable(void); +#else +static inline int ibt_setup(void) { return 0; } +static inline void ibt_disable(void) {} +#endif + #ifdef CONFIG_X86_SHADOW_STACK int prctl_cet(int option, u64 arg2); #else diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 39e826b5cabd..cce07a920fec 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -152,6 +152,7 @@ obj-$(CONFIG_UNWINDER_GUESS) +=3D unwind_guess.o obj-$(CONFIG_AMD_MEM_ENCRYPT) +=3D sev.o obj-$(CONFIG_X86_SHADOW_STACK) +=3D shstk.o obj-$(CONFIG_X86_SHADOW_STACK) +=3D shstk.o cet_prctl.o +obj-$(CONFIG_X86_IBT) +=3D ibt.o ### # 64 bit specific files ifeq ($(CONFIG_X86_64),y) diff --git a/arch/x86/kernel/ibt.c b/arch/x86/kernel/ibt.c new file mode 100644 index 000000000000..4ab7af33b274 --- /dev/null +++ b/arch/x86/kernel/ibt.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ibt.c - Intel Indirect Branch Tracking support + * + * Copyright (c) 2021, Intel Corporation. + * Yu-cheng Yu + */ + +#include +#include +#include +#include +#include +#include + +static int ibt_set_clear_msr_bits(u64 set, u64 clear) +{ + u64 msr; + int r; + + fpregs_lock(); + + if (test_thread_flag(TIF_NEED_FPU_LOAD)) + fpregs_restore_userregs(); + + r =3D rdmsrl_safe(MSR_IA32_U_CET, &msr); + if (!r) { + msr =3D (msr & ~clear) | set; + r =3D wrmsrl_safe(MSR_IA32_U_CET, msr); + } + + fpregs_unlock(); + + return r; +} + +int ibt_setup(void) +{ + int r; + + if (!cpu_feature_enabled(X86_FEATURE_IBT)) + return 0; + + r =3D ibt_set_clear_msr_bits(CET_ENDBR_EN | CET_NO_TRACK_EN, 0); + if (!r) + current->thread.shstk.ibt =3D 1; + + return r; +} + +void ibt_disable(void) +{ + if (!current->thread.shstk.ibt) + return; + + ibt_set_clear_msr_bits(0, CET_ENDBR_EN); + current->thread.shstk.ibt =3D 0; +} --=20 2.21.0