From: Brijesh Singh <brijesh.singh@amd.com>
To: <x86@kernel.org>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>, <linux-efi@vger.kernel.org>,
<platform-driver-x86@vger.kernel.org>,
<linux-coco@lists.linux.dev>, <linux-mm@kvack.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Joerg Roedel <jroedel@suse.de>,
Tom Lendacky <thomas.lendacky@amd.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Ard Biesheuvel <ardb@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
Jim Mattson <jmattson@google.com>,
"Andy Lutomirski" <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Sergio Lopez <slp@redhat.com>, Peter Gonda <pgonda@google.com>,
"Peter Zijlstra" <peterz@infradead.org>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
David Rientjes <rientjes@google.com>,
Dov Murik <dovmurik@linux.ibm.com>,
Tobin Feldman-Fitzthum <tobin@ibm.com>,
Borislav Petkov <bp@alien8.de>,
Michael Roth <michael.roth@amd.com>,
Vlastimil Babka <vbabka@suse.cz>,
"Kirill A . Shutemov" <kirill@shutemov.name>,
Andi Kleen <ak@linux.intel.com>,
"Dr . David Alan Gilbert" <dgilbert@redhat.com>,
<brijesh.ksingh@gmail.com>, <tony.luck@intel.com>,
<marcorr@google.com>,
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: [PATCH v9 15/43] x86/sev: Register GHCB memory when SEV-SNP is active
Date: Fri, 28 Jan 2022 11:17:36 -0600 [thread overview]
Message-ID: <20220128171804.569796-16-brijesh.singh@amd.com> (raw)
In-Reply-To: <20220128171804.569796-1-brijesh.singh@amd.com>
The SEV-SNP guest is required by the GHCB spec to register the GHCB's
Guest Physical Address (GPA). This is because the hypervisor may prefer
that a guest use a consistent and/or specific GPA for the GHCB associated
with a vCPU. For more information, see the GHCB specification section
"GHCB GPA Registration".
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
arch/x86/include/asm/sev.h | 2 +
arch/x86/kernel/cpu/common.c | 4 +
arch/x86/kernel/head64.c | 4 +-
arch/x86/kernel/sev-shared.c | 2 +-
arch/x86/kernel/sev.c | 145 ++++++++++++++++++++---------------
5 files changed, 94 insertions(+), 63 deletions(-)
diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h
index e37451849165..48df02713ee0 100644
--- a/arch/x86/include/asm/sev.h
+++ b/arch/x86/include/asm/sev.h
@@ -122,6 +122,7 @@ static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate)
return rc;
}
+void setup_ghcb(void);
#else
static inline void sev_es_ist_enter(struct pt_regs *regs) { }
static inline void sev_es_ist_exit(void) { }
@@ -130,6 +131,7 @@ static inline void sev_es_nmi_complete(void) { }
static inline int sev_es_efi_map_ghcbs(pgd_t *pgd) { return 0; }
static inline int pvalidate(unsigned long vaddr, bool rmp_psize, bool validate) { return 0; }
static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs) { return 0; }
+static inline void setup_ghcb(void) { }
#endif
#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 7b8382c11788..d3c319f2ffd2 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -59,6 +59,7 @@
#include <asm/cpu_device_id.h>
#include <asm/uv/uv.h>
#include <asm/sigframe.h>
+#include <asm/sev.h>
#include "cpu.h"
@@ -1988,6 +1989,9 @@ void cpu_init_exception_handling(void)
load_TR_desc();
+ /* GHCB need to be setup to handle #VC. */
+ setup_ghcb();
+
/* Finally load the IDT */
load_current_idt();
}
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 66363f51a3ad..8075e91cff2b 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -597,8 +597,10 @@ static void startup_64_load_idt(unsigned long physbase)
void early_setup_idt(void)
{
/* VMM Communication Exception */
- if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
+ if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) {
+ setup_ghcb();
set_bringup_idt_handler(bringup_idt_table, X86_TRAP_VC, vc_boot_ghcb);
+ }
bringup_idt_descr.address = (unsigned long)bringup_idt_table;
native_load_idt(&bringup_idt_descr);
diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c
index e9ff13cd90b0..3aaef1a18ffe 100644
--- a/arch/x86/kernel/sev-shared.c
+++ b/arch/x86/kernel/sev-shared.c
@@ -68,7 +68,7 @@ static u64 get_hv_features(void)
return GHCB_MSR_HV_FT_RESP_VAL(val);
}
-static void __maybe_unused snp_register_ghcb_early(unsigned long paddr)
+static void snp_register_ghcb_early(unsigned long paddr)
{
unsigned long pfn = paddr >> PAGE_SHIFT;
u64 val;
diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c
index 24df739c9c05..b86b48b66a44 100644
--- a/arch/x86/kernel/sev.c
+++ b/arch/x86/kernel/sev.c
@@ -41,7 +41,7 @@ static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);
* Needs to be in the .data section because we need it NULL before bss is
* cleared
*/
-static struct ghcb __initdata *boot_ghcb;
+static struct ghcb *boot_ghcb __section(".data");
/* Bitmap of SEV features supported by the hypervisor */
static u64 sev_hv_features __ro_after_init;
@@ -161,55 +161,6 @@ void noinstr __sev_es_ist_exit(void)
this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist);
}
-/*
- * Nothing shall interrupt this code path while holding the per-CPU
- * GHCB. The backup GHCB is only for NMIs interrupting this path.
- *
- * Callers must disable local interrupts around it.
- */
-static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state)
-{
- struct sev_es_runtime_data *data;
- struct ghcb *ghcb;
-
- WARN_ON(!irqs_disabled());
-
- data = this_cpu_read(runtime_data);
- ghcb = &data->ghcb_page;
-
- if (unlikely(data->ghcb_active)) {
- /* GHCB is already in use - save its contents */
-
- if (unlikely(data->backup_ghcb_active)) {
- /*
- * Backup-GHCB is also already in use. There is no way
- * to continue here so just kill the machine. To make
- * panic() work, mark GHCBs inactive so that messages
- * can be printed out.
- */
- data->ghcb_active = false;
- data->backup_ghcb_active = false;
-
- instrumentation_begin();
- panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use");
- instrumentation_end();
- }
-
- /* Mark backup_ghcb active before writing to it */
- data->backup_ghcb_active = true;
-
- state->ghcb = &data->backup_ghcb;
-
- /* Backup GHCB content */
- *state->ghcb = *ghcb;
- } else {
- state->ghcb = NULL;
- data->ghcb_active = true;
- }
-
- return ghcb;
-}
-
static inline u64 sev_es_rd_ghcb_msr(void)
{
return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
@@ -483,6 +434,55 @@ static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt
/* Include code shared with pre-decompression boot stage */
#include "sev-shared.c"
+/*
+ * Nothing shall interrupt this code path while holding the per-CPU
+ * GHCB. The backup GHCB is only for NMIs interrupting this path.
+ *
+ * Callers must disable local interrupts around it.
+ */
+static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state)
+{
+ struct sev_es_runtime_data *data;
+ struct ghcb *ghcb;
+
+ WARN_ON(!irqs_disabled());
+
+ data = this_cpu_read(runtime_data);
+ ghcb = &data->ghcb_page;
+
+ if (unlikely(data->ghcb_active)) {
+ /* GHCB is already in use - save its contents */
+
+ if (unlikely(data->backup_ghcb_active)) {
+ /*
+ * Backup-GHCB is also already in use. There is no way
+ * to continue here so just kill the machine. To make
+ * panic() work, mark GHCBs inactive so that messages
+ * can be printed out.
+ */
+ data->ghcb_active = false;
+ data->backup_ghcb_active = false;
+
+ instrumentation_begin();
+ panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use");
+ instrumentation_end();
+ }
+
+ /* Mark backup_ghcb active before writing to it */
+ data->backup_ghcb_active = true;
+
+ state->ghcb = &data->backup_ghcb;
+
+ /* Backup GHCB content */
+ *state->ghcb = *ghcb;
+ } else {
+ state->ghcb = NULL;
+ data->ghcb_active = true;
+ }
+
+ return ghcb;
+}
+
static noinstr void __sev_put_ghcb(struct ghcb_state *state)
{
struct sev_es_runtime_data *data;
@@ -647,15 +647,40 @@ static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
return ret;
}
-/*
- * This function runs on the first #VC exception after the kernel
- * switched to virtual addresses.
- */
-static bool __init sev_es_setup_ghcb(void)
+static void snp_register_per_cpu_ghcb(void)
+{
+ struct sev_es_runtime_data *data;
+ struct ghcb *ghcb;
+
+ data = this_cpu_read(runtime_data);
+ ghcb = &data->ghcb_page;
+
+ snp_register_ghcb_early(__pa(ghcb));
+}
+
+void setup_ghcb(void)
{
+ if (!cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
+ return;
+
/* First make sure the hypervisor talks a supported protocol. */
if (!sev_es_negotiate_protocol())
- return false;
+ sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
+
+ /*
+ * Check whether the runtime #VC exception handler is active.
+ * The runtime exception handler uses the per-CPU GHCB page, and
+ * the GHCB page would be setup by sev_es_init_vc_handling().
+ *
+ * If SEV-SNP is active, then register the per-CPU GHCB page so
+ * that runtime exception handler can use it.
+ */
+ if (initial_vc_handler == (unsigned long)kernel_exc_vmm_communication) {
+ if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP))
+ snp_register_per_cpu_ghcb();
+
+ return;
+ }
/*
* Clear the boot_ghcb. The first exception comes in before the bss
@@ -666,7 +691,9 @@ static bool __init sev_es_setup_ghcb(void)
/* Alright - Make the boot-ghcb public */
boot_ghcb = &boot_ghcb_page;
- return true;
+ /* SEV-SNP guest requires that GHCB GPA must be registered. */
+ if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP))
+ snp_register_ghcb_early(__pa(&boot_ghcb_page));
}
#ifdef CONFIG_HOTPLUG_CPU
@@ -1398,10 +1425,6 @@ bool __init handle_vc_boot_ghcb(struct pt_regs *regs)
struct es_em_ctxt ctxt;
enum es_result result;
- /* Do initial setup or terminate the guest */
- if (unlikely(boot_ghcb == NULL && !sev_es_setup_ghcb()))
- sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
-
vc_ghcb_invalidate(boot_ghcb);
result = vc_init_em_ctxt(&ctxt, regs, exit_code);
--
2.25.1
next prev parent reply other threads:[~2022-01-28 17:18 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-28 17:17 [PATCH v9 00/43] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 01/43] KVM: SVM: Define sev_features and vmpl field in the VMSA Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 02/43] KVM: SVM: Create a separate mapping for the SEV-ES save area Brijesh Singh
[not found] ` <YfkvchuxmkHgnPWT@zn.tnic>
2022-02-09 15:02 ` Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 03/43] KVM: SVM: Create a separate mapping for the GHCB " Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 04/43] KVM: SVM: Update the SEV-ES save area mapping Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 05/43] x86/compressed/64: Detect/setup SEV/SME features earlier in boot Brijesh Singh
[not found] ` <Yfl3FaTGPxE7qMCq@zn.tnic>
2022-02-01 20:35 ` Michael Roth
[not found] ` <YfmmBykN2s0HsiAJ@zn.tnic>
2022-02-02 0:52 ` Michael Roth
[not found] ` <YfogFFOoHvCV+/2Y@zn.tnic>
2022-02-02 17:28 ` Michael Roth
2022-01-28 17:17 ` [PATCH v9 06/43] x86/sev: " Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 07/43] x86/mm: Extend cc_attr to include AMD SEV-SNP Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 08/43] x86/sev: Define the Linux specific guest termination reasons Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 09/43] x86/sev: Save the negotiated GHCB version Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 10/43] x86/sev: Check SEV-SNP features support Brijesh Singh
[not found] ` <YfmRBUtoWNb9BkuL@zn.tnic>
2022-02-02 14:28 ` Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 11/43] x86/sev: Add a helper for the PVALIDATE instruction Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 12/43] x86/sev: Check the vmpl level Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 13/43] x86/compressed: Add helper for validating pages in the decompression stage Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 14/43] x86/compressed: Register GHCB memory when SEV-SNP is active Brijesh Singh
2022-01-28 17:17 ` Brijesh Singh [this message]
[not found] ` <YfpeSErxB9KHOd7m@zn.tnic>
2022-02-02 14:29 ` [PATCH v9 15/43] x86/sev: " Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 16/43] x86/sev: Add helper for validating pages in early enc attribute changes Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 17/43] x86/kernel: Make the .bss..decrypted section shared in RMP table Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 18/43] x86/kernel: Validate ROM memory before accessing when SEV-SNP is active Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 19/43] x86/mm: Add support to validate memory when changing C-bit Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 20/43] x86/sev: Use SEV-SNP AP creation to start secondary CPUs Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 21/43] x86/head/64: Re-enable stack protection Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 22/43] x86/sev: Move MSR-based VMGEXITs for CPUID to helper Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 23/43] KVM: x86: Move lookup of indexed CPUID leafs " Brijesh Singh
[not found] ` <Yfvx0Rq8Tydyr/RO@zn.tnic>
2022-02-03 16:44 ` Michael Roth
2022-01-28 17:17 ` [PATCH v9 24/43] x86/compressed/acpi: Move EFI detection " Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 25/43] x86/compressed/acpi: Move EFI system table lookup " Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 26/43] x86/compressed/acpi: Move EFI config " Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 27/43] x86/compressed/acpi: Move EFI vendor " Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 28/43] x86/compressed/acpi: Move EFI kexec handling into common code Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 29/43] x86/boot: Add Confidential Computing type to setup_data Brijesh Singh
[not found] ` <Yf1Sn4AdPgIzpih9@zn.tnic>
2022-02-04 17:41 ` Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 30/43] KVM: SEV: Add documentation for SEV-SNP CPUID Enforcement Brijesh Singh
2022-02-07 23:48 ` Sean Christopherson
2022-02-08 14:54 ` Michael Roth
2022-02-08 15:11 ` Borislav Petkov
2022-01-28 17:17 ` [PATCH v9 31/43] x86/compressed/64: Add support for SEV-SNP CPUID table in #VC handlers Brijesh Singh
[not found] ` <Yf5XScto3mDXnl9u@zn.tnic>
2022-02-05 15:42 ` Michael Roth
2022-02-05 16:22 ` Michael Roth
[not found] ` <Yf/PN8rBy3m5seU9@zn.tnic>
2022-02-07 15:37 ` Michael Roth
2022-01-28 17:17 ` [PATCH v9 32/43] x86/boot: Add a pointer to Confidential Computing blob in bootparams Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 33/43] x86/compressed: Add SEV-SNP feature detection/setup Brijesh Singh
[not found] ` <Yf/6NhnS50UDv4xV@zn.tnic>
2022-02-08 13:50 ` Michael Roth
2022-02-08 15:02 ` Borislav Petkov
2022-01-28 17:17 ` [PATCH v9 34/43] x86/compressed: Use firmware-validated CPUID leaves for SEV-SNP guests Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 35/43] x86/compressed: Export and rename add_identity_map() Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 36/43] x86/compressed/64: Add identity mapping for Confidential Computing blob Brijesh Singh
2022-01-28 17:17 ` [PATCH v9 37/43] x86/sev: Add SEV-SNP feature detection/setup Brijesh Singh
[not found] ` <YgAjq3mSudt+G+6Y@zn.tnic>
2022-02-08 5:25 ` Michael Roth
2022-01-28 17:17 ` [PATCH v9 38/43] x86/sev: Use firmware-validated CPUID for SEV-SNP guests Brijesh Singh
2022-02-05 17:19 ` Michael Roth
[not found] ` <Yf/tQPqbP97lrVpg@zn.tnic>
2022-02-07 17:00 ` Michael Roth
2022-01-28 17:18 ` [PATCH v9 39/43] x86/sev: Provide support for SNP guest request NAEs Brijesh Singh
2022-02-01 20:17 ` Peter Gonda
2022-03-03 14:53 ` Brijesh Singh
2022-01-28 17:18 ` [PATCH v9 40/43] x86/sev: Register SEV-SNP guest request platform device Brijesh Singh
2022-02-01 20:21 ` Peter Gonda
2022-02-02 16:27 ` Brijesh Singh
2022-01-28 17:18 ` [PATCH v9 41/43] virt: Add SEV-SNP guest driver Brijesh Singh
2022-02-01 20:33 ` Peter Gonda
2022-02-06 22:39 ` Borislav Petkov
2022-02-07 14:41 ` Brijesh Singh
2022-01-28 17:18 ` [PATCH v9 42/43] virt: sevguest: Add support to derive key Brijesh Singh
2022-02-01 20:39 ` Peter Gonda
2022-02-02 22:31 ` Brijesh Singh
[not found] ` <YgDduR0mrptX5arB@zn.tnic>
2022-02-07 16:23 ` Brijesh Singh
2022-02-07 19:09 ` Dov Murik
2022-02-07 20:08 ` Brijesh Singh
2022-02-08 7:56 ` Dov Murik
2022-02-08 10:51 ` Borislav Petkov
2022-02-08 14:14 ` Brijesh Singh
2022-01-28 17:18 ` [PATCH v9 43/43] virt: sevguest: Add support to get extended report Brijesh Singh
2022-02-01 20:43 ` Peter Gonda
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