From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>
Cc: x86@kernel.org, Kostya Serebryany <kcc@google.com>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Alexander Potapenko <glider@google.com>,
Taras Madan <tarasmadan@google.com>,
Dmitry Vyukov <dvyukov@google.com>,
"H . J . Lu" <hjl.tools@gmail.com>,
Andi Kleen <ak@linux.intel.com>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv8 06/11] x86/mm: Provide arch_prctl() interface for LAM
Date: Tue, 30 Aug 2022 04:00:59 +0300 [thread overview]
Message-ID: <20220830010104.1282-7-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20220830010104.1282-1-kirill.shutemov@linux.intel.com>
Add a couple of arch_prctl() handles:
- ARCH_ENABLE_TAGGED_ADDR enabled LAM. The argument is required number
of tag bits. It is rounded up to the nearest LAM mode that can
provide it. For now only LAM_U57 is supported, with 6 tag bits.
- ARCH_GET_UNTAG_MASK returns untag mask. It can indicates where tag
bits located in the address.
- ARCH_GET_MAX_TAG_BITS returns the maximum tag bits user can request.
Zero if LAM is not supported.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Tested-by: Alexander Potapenko <glider@google.com>
Reviewed-by: Alexander Potapenko <glider@google.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/uapi/asm/prctl.h | 4 ++
arch/x86/kernel/process_64.c | 64 ++++++++++++++++++++++++++++++-
2 files changed, 67 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h
index 500b96e71f18..a31e27b95b19 100644
--- a/arch/x86/include/uapi/asm/prctl.h
+++ b/arch/x86/include/uapi/asm/prctl.h
@@ -20,4 +20,8 @@
#define ARCH_MAP_VDSO_32 0x2002
#define ARCH_MAP_VDSO_64 0x2003
+#define ARCH_GET_UNTAG_MASK 0x4001
+#define ARCH_ENABLE_TAGGED_ADDR 0x4002
+#define ARCH_GET_MAX_TAG_BITS 0x4003
+
#endif /* _ASM_X86_PRCTL_H */
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 1962008fe743..455601a3cc3f 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -742,6 +742,59 @@ static long prctl_map_vdso(const struct vdso_image *image, unsigned long addr)
}
#endif
+static void enable_lam_func(void *mm)
+{
+ struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
+ unsigned long lam_mask;
+ unsigned long cr3;
+
+ if (loaded_mm != mm)
+ return;
+
+ lam_mask = READ_ONCE(loaded_mm->context.lam_cr3_mask);
+
+ /* Update CR3 to get LAM active on the CPU */
+ cr3 = __read_cr3();
+ cr3 &= ~(X86_CR3_LAM_U48 | X86_CR3_LAM_U57);
+ cr3 |= lam_mask;
+ write_cr3(cr3);
+ set_tlbstate_cr3_lam_mask(lam_mask);
+}
+
+#define LAM_U57_BITS 6
+
+static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits)
+{
+ int ret = 0;
+
+ if (!cpu_feature_enabled(X86_FEATURE_LAM))
+ return -ENODEV;
+
+ mutex_lock(&mm->context.lock);
+
+ /* Already enabled? */
+ if (mm->context.lam_cr3_mask) {
+ ret = -EBUSY;
+ goto out;
+ }
+
+ if (!nr_bits) {
+ ret = -EINVAL;
+ goto out;
+ } else if (nr_bits <= LAM_U57_BITS) {
+ mm->context.lam_cr3_mask = X86_CR3_LAM_U57;
+ mm->context.untag_mask = ~GENMASK(62, 57);
+ } else {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ on_each_cpu_mask(mm_cpumask(mm), enable_lam_func, mm, true);
+out:
+ mutex_unlock(&mm->context.lock);
+ return ret;
+}
+
long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2)
{
int ret = 0;
@@ -829,7 +882,16 @@ long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2)
case ARCH_MAP_VDSO_64:
return prctl_map_vdso(&vdso_image_64, arg2);
#endif
-
+ case ARCH_GET_UNTAG_MASK:
+ return put_user(task->mm->context.untag_mask,
+ (unsigned long __user *)arg2);
+ case ARCH_ENABLE_TAGGED_ADDR:
+ return prctl_enable_tagged_addr(task->mm, arg2);
+ case ARCH_GET_MAX_TAG_BITS:
+ if (!cpu_feature_enabled(X86_FEATURE_LAM))
+ return put_user(0, (unsigned long __user *)arg2);
+ else
+ return put_user(LAM_U57_BITS, (unsigned long __user *)arg2);
default:
ret = -EINVAL;
break;
--
2.35.1
next prev parent reply other threads:[~2022-08-30 1:01 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 1:00 [PATCHv8 00/11] Linear Address Masking enabling Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 01/11] x86/mm: Fix CR3_ADDR_MASK Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 02/11] x86: CPUID and CR3/CR4 flags for Linear Address Masking Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 03/11] mm: Pass down mm_struct to untagged_addr() Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 04/11] x86/mm: Handle LAM on context switch Kirill A. Shutemov
2022-08-30 1:00 ` [PATCHv8 05/11] x86/uaccess: Provide untagged_addr() and remove tags before address check Kirill A. Shutemov
2022-08-30 1:00 ` Kirill A. Shutemov [this message]
2022-08-30 1:01 ` [PATCHv8 07/11] x86: Expose untagging mask in /proc/$PID/arch_status Kirill A. Shutemov
2022-08-30 1:01 ` [PATCHv8 08/11] selftests/x86/lam: Add malloc and tag-bits test cases for linear-address masking Kirill A. Shutemov
2022-08-30 1:01 ` [PATCHv8 09/11] selftests/x86/lam: Add mmap and SYSCALL " Kirill A. Shutemov
2022-09-07 3:19 ` Robert Hoo
2022-09-09 11:24 ` Zhang, Weihong
2022-08-30 1:01 ` [PATCHv8 10/11] selftests/x86/lam: Add io_uring " Kirill A. Shutemov
2022-08-30 1:01 ` [PATCHv8 11/11] selftests/x86/lam: Add inherit " Kirill A. Shutemov
2022-09-01 17:45 ` [PATCHv8 00/11] Linear Address Masking enabling Ashok Raj
2022-09-04 0:39 ` Kirill A. Shutemov
2022-09-09 16:08 ` Ashok Raj
2022-09-12 20:39 ` Jacob Pan
2022-09-12 21:41 ` Dave Hansen
2022-09-12 22:55 ` Jacob Pan
2022-09-13 0:06 ` Kirill A. Shutemov
2022-09-13 0:23 ` Ashok Raj
2022-09-12 22:49 ` Kirill A. Shutemov
2022-09-13 0:08 ` Jacob Pan
2022-09-13 0:18 ` Kirill A. Shutemov
2022-09-14 14:45 ` Kirill A. Shutemov
2022-09-14 15:11 ` Ashok Raj
2022-09-14 15:18 ` Kirill A. Shutemov
2022-09-14 15:31 ` Ashok Raj
2022-09-14 15:45 ` Kirill A. Shutemov
2022-09-14 23:51 ` Jacob Pan
2022-09-15 9:01 ` Kirill A. Shutemov
2022-09-15 17:28 ` Kirill A. Shutemov
2022-09-20 13:14 ` Jason Gunthorpe
2022-09-20 14:57 ` Ashok Raj
2022-09-20 16:06 ` Dave Hansen
2022-09-20 16:27 ` Jason Gunthorpe
2022-09-20 18:41 ` Jacob Pan
2022-09-20 18:50 ` Jason Gunthorpe
2022-09-20 20:44 ` Jacob Pan
2022-09-21 0:01 ` Jason Gunthorpe
2022-09-21 9:36 ` Tian, Kevin
2022-09-21 16:57 ` Dave Hansen
2022-09-21 17:08 ` Ashok Raj
2022-09-21 17:11 ` Dave Hansen
2022-09-21 17:29 ` Ashok Raj
2022-09-21 18:11 ` Jason Gunthorpe
2022-09-23 0:42 ` Kirill A. Shutemov
2022-09-23 5:27 ` Ashok Raj
2022-09-23 9:38 ` Kirill A. Shutemov
2022-09-23 11:46 ` Jason Gunthorpe
2022-09-23 14:18 ` Dave Hansen
2022-09-23 14:42 ` Jason Gunthorpe
2022-09-23 14:59 ` Ashok Raj
2022-09-23 15:28 ` Ashok Raj
2022-09-23 15:31 ` Dave Hansen
2022-09-23 15:44 ` Ashok Raj
2022-09-23 16:23 ` Dave Hansen
2022-09-23 16:44 ` Jason Gunthorpe
2022-09-04 1:00 ` Kirill A. Shutemov
2022-09-05 5:05 ` Bharata B Rao
2022-09-05 13:44 ` Kirill A. Shutemov
2022-09-05 14:30 ` Peter Zijlstra
2022-09-05 15:35 ` Kirill A. Shutemov
2022-09-05 15:46 ` Peter Zijlstra
2022-09-05 16:47 ` Kirill A. Shutemov
2022-09-06 8:39 ` Peter Zijlstra
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