From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B6EDC433E6 for ; Wed, 2 Sep 2020 03:46:02 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id E6B95206EB for ; Wed, 2 Sep 2020 03:46:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E6B95206EB Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 646F76B0003; Tue, 1 Sep 2020 23:46:01 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 5CFE66B0037; Tue, 1 Sep 2020 23:46:01 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 4969F6B0055; Tue, 1 Sep 2020 23:46:01 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0034.hostedemail.com [216.40.44.34]) by kanga.kvack.org (Postfix) with ESMTP id 2DB496B0003 for ; Tue, 1 Sep 2020 23:46:01 -0400 (EDT) Received: from smtpin24.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id DB51B180AD806 for ; Wed, 2 Sep 2020 03:46:00 +0000 (UTC) X-FDA: 77216732880.24.frogs48_2312e5f2709d Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin24.hostedemail.com (Postfix) with ESMTP id AF4351A4A0 for ; Wed, 2 Sep 2020 03:46:00 +0000 (UTC) X-HE-Tag: frogs48_2312e5f2709d X-Filterd-Recvd-Size: 5552 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf44.hostedemail.com (Postfix) with ESMTP for ; Wed, 2 Sep 2020 03:46:00 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 370CDD6E; Tue, 1 Sep 2020 20:45:59 -0700 (PDT) Received: from [192.168.0.130] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 382A73F66F; Tue, 1 Sep 2020 20:45:54 -0700 (PDT) From: Anshuman Khandual Subject: Re: [PATCH v3 03/13] mm/debug_vm_pgtable/ppc64: Avoid setting top bits in radom value To: "Aneesh Kumar K.V" , linux-mm@kvack.org, akpm@linux-foundation.org Cc: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-s390@vger.kernel.org, linux-snps-arc@lists.infradead.org, x86@kernel.org, linux-arch@vger.kernel.org, Gerald Schaefer , Christophe Leroy , Vineet Gupta , Mike Rapoport , Qian Cai References: <20200827080438.315345-1-aneesh.kumar@linux.ibm.com> <20200827080438.315345-4-aneesh.kumar@linux.ibm.com> <3a0b0101-e6ec-26c5-e104-5b0bb95c3e51@arm.com> <1a8abe92-032b-f60f-1df1-52bb409b35a3@linux.ibm.com> <75771782-734b-69f6-4a07-2d3542458319@arm.com> <3f20130a-f9fc-db9d-50a9-76aca5a1a6d7@linux.ibm.com> Message-ID: <2f6f2e26-5c77-d9cb-667c-0f7d35923e31@arm.com> Date: Wed, 2 Sep 2020 09:15:12 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <3f20130a-f9fc-db9d-50a9-76aca5a1a6d7@linux.ibm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US X-Rspamd-Queue-Id: AF4351A4A0 X-Spamd-Result: default: False [0.00 / 100.00] X-Rspamd-Server: rspam05 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 09/01/2020 01:25 PM, Aneesh Kumar K.V wrote: > On 9/1/20 1:16 PM, Anshuman Khandual wrote: >> >> >> On 09/01/2020 01:06 PM, Aneesh Kumar K.V wrote: >>> On 9/1/20 1:02 PM, Anshuman Khandual wrote: >>>> >>>> >>>> On 09/01/2020 11:51 AM, Aneesh Kumar K.V wrote: >>>>> On 9/1/20 8:45 AM, Anshuman Khandual wrote: >>>>>> >>>>>> >>>>>> On 08/27/2020 01:34 PM, Aneesh Kumar K.V wrote: >>>>>>> ppc64 use bit 62 to indicate a pte entry (_PAGE_PTE). Avoid setti= ng that bit in >>>>>>> random value. >>>>>>> >>>>>>> Signed-off-by: Aneesh Kumar K.V >>>>>>> --- >>>>>>> =C2=A0=C2=A0=C2=A0 mm/debug_vm_pgtable.c | 13 ++++++++++--- >>>>>>> =C2=A0=C2=A0=C2=A0 1 file changed, 10 insertions(+), 3 deletions(= -) >>>>>>> >>>>>>> diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c >>>>>>> index 086309fb9b6f..bbf9df0e64c6 100644 >>>>>>> --- a/mm/debug_vm_pgtable.c >>>>>>> +++ b/mm/debug_vm_pgtable.c >>>>>>> @@ -44,10 +44,17 @@ >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0 * entry type. But these bits might affec= t the ability to clear entries with >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0 * pxx_clear() because of how dynamic pag= e table folding works on s390. So >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0 * while loading up the entries do not ch= ange the lower 4 bits. It does not >>>>>>> - * have affect any other platform. >>>>>>> + * have affect any other platform. Also avoid the 62nd bit on pp= c64 that is >>>>>>> + * used to mark a pte entry. >>>>>>> =C2=A0=C2=A0=C2=A0=C2=A0 */ >>>>>>> -#define S390_MASK_BITS=C2=A0=C2=A0=C2=A0 4 >>>>>>> -#define RANDOM_ORVALUE=C2=A0=C2=A0=C2=A0 GENMASK(BITS_PER_LONG -= 1, S390_MASK_BITS) >>>>>>> +#define S390_SKIP_MASK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= GENMASK(3, 0) >>>>>>> +#ifdef CONFIG_PPC_BOOK3S_64 >>>>>>> +#define PPC64_SKIP_MASK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= GENMASK(62, 62) >>>>>>> +#else >>>>>>> +#define PPC64_SKIP_MASK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= 0x0 >>>>>>> +#endif >>>>>> >>>>>> Please drop the #ifdef CONFIG_PPC_BOOK3S_64 here. We already accom= modate skip >>>>>> bits for a s390 platform requirement and can also do so for ppc64 = as well. As >>>>>> mentioned before, please avoid adding any platform specific constr= ucts in the >>>>>> test. >>>>>> >>>>> >>>>> >>>>> that is needed so that it can be built on 32 bit architectures.I di= d face build errors with arch-linux >>>> >>>> Could not (#if __BITS_PER_LONG =3D=3D 32) be used instead or somethi= ng like >>>> that. But should be a generic conditional check identifying 32 bit a= rch >>>> not anything platform specific. >>>> >>> >>> that _PAGE_PTE bit is pretty much specific to PPC BOOK3S_64.=C2=A0 No= t sure why other architectures need to bothered about ignoring bit 62. >> >> Thats okay as long it does not adversely affect other architectures, i= gnoring >> some more bits is acceptable. Like existing S390_MASK_BITS gets ignore= d on all >> other platforms even if it is a s390 specific constraint. Not having p= latform >> specific #ifdef here, is essential. >> >=20 > Why is it essential? IIRC, I might have already replied on this couple of times. But let me tr= y once more. It is a generic test aimed at finding inconsistencies between different a= rchitectures in terms of the page table helper semantics. Any platform specific constr= uct here, to 'make things work' has the potential to hide such inconsistencies and def= eat the very purpose. The test/file here follows this rule consistently i.e there is n= ot a single platform specific #ifdef right now and would really like to continue main= taining this property, unless until absolutely necessary. Current situation here wrt 3= 2 bit archs can easily be accommodated with a generic check such as __BITS_PER_LONG.