From: Jan Stancek <jstancek@redhat.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will.deacon@arm.com>,
Yang Shi <yang.shi@linux.alibaba.com>,
akpm@linux-foundation.org, stable@vger.kernel.org,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
aneesh kumar <aneesh.kumar@linux.vnet.ibm.com>,
npiggin@gmail.com, namit@vmware.com, minchan@kernel.org,
Mel Gorman <mgorman@suse.de>, Jan Stancek <jstancek@redhat.com>
Subject: Re: [PATCH] mm: mmu_gather: remove __tlb_reset_range() for force flush
Date: Thu, 9 May 2019 08:44:57 -0400 (EDT) [thread overview]
Message-ID: <436298752.21855393.1557405897147.JavaMail.zimbra@redhat.com> (raw)
In-Reply-To: <20190509103813.GP2589@hirez.programming.kicks-ass.net>
> > I don't think we can elide the call __tlb_reset_range() entirely, since I
> > think we do want to clear the freed_pXX bits to ensure that we walk the
> > range with the smallest mapping granule that we have. Otherwise couldn't we
> > have a problem if we hit a PMD that had been cleared, but the TLB
> > invalidation for the PTEs that used to be linked below it was still
> > pending?
>
> That's tlb->cleared_p*, and yes agreed. That is, right until some
> architecture has level dependent TLBI instructions, at which point we'll
> need to have them all set instead of cleared.
>
> > Perhaps we should just set fullmm if we see that here's a concurrent
> > unmapper rather than do a worst-case range invalidation. Do you have a
> > feeling
> > for often the mm_tlb_flush_nested() triggers in practice?
>
> Quite a bit for certain workloads I imagine, that was the whole point of
> doing it.
>
> Anyway; am I correct in understanding that the actual problem is that
> we've cleared freed_tables and the ARM64 tlb_flush() will then not
> invalidate the cache and badness happens?
That is my understanding, only last level is flushed, which is not enough.
>
> Because so far nobody has actually provided a coherent description of
> the actual problem we're trying to solve. But I'm thinking something
> like the below ought to do.
I applied it (and fixed small typo: s/tlb->full_mm/tlb->fullmm/).
It fixes the problem for me.
>
>
> diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c
> index 99740e1dd273..fe768f8d612e 100644
> --- a/mm/mmu_gather.c
> +++ b/mm/mmu_gather.c
> @@ -244,15 +244,20 @@ void tlb_finish_mmu(struct mmu_gather *tlb,
> unsigned long start, unsigned long end)
> {
> /*
> - * If there are parallel threads are doing PTE changes on same range
> - * under non-exclusive lock(e.g., mmap_sem read-side) but defer TLB
> - * flush by batching, a thread has stable TLB entry can fail to flush
> - * the TLB by observing pte_none|!pte_dirty, for example so flush TLB
> - * forcefully if we detect parallel PTE batching threads.
> + * Sensible comment goes here..
> */
> - if (mm_tlb_flush_nested(tlb->mm)) {
> - __tlb_reset_range(tlb);
> - __tlb_adjust_range(tlb, start, end - start);
> + if (mm_tlb_flush_nested(tlb->mm) && !tlb->full_mm) {
> + /*
> + * Since we're can't tell what we actually should have
> + * flushed flush everything in the given range.
> + */
> + tlb->start = start;
> + tlb->end = end;
> + tlb->freed_tables = 1;
> + tlb->cleared_ptes = 1;
> + tlb->cleared_pmds = 1;
> + tlb->cleared_puds = 1;
> + tlb->cleared_p4ds = 1;
> }
>
> tlb_flush_mmu(tlb);
>
next prev parent reply other threads:[~2019-05-09 12:45 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-07 21:34 [PATCH] mm: mmu_gather: remove __tlb_reset_range() for force flush Yang Shi
2019-05-09 8:37 ` Will Deacon
2019-05-09 10:38 ` Peter Zijlstra
2019-05-09 10:54 ` Peter Zijlstra
2019-05-09 18:35 ` Yang Shi
2019-05-09 18:40 ` Peter Zijlstra
2019-05-09 12:44 ` Jan Stancek [this message]
2019-05-09 17:36 ` Nadav Amit
2019-05-09 18:24 ` Peter Zijlstra
2019-05-09 19:10 ` Yang Shi
2019-05-09 21:06 ` Jan Stancek
2019-05-09 21:48 ` Yang Shi
2019-05-09 22:12 ` Jan Stancek
[not found] ` <04668E51-FD87-4D53-A066-5A35ABC3A0D6@vmware.com>
[not found] ` <20190509191120.GD2623@hirez.programming.kicks-ass.net>
2019-05-09 21:21 ` Nadav Amit
2019-05-13 8:36 ` Peter Zijlstra
2019-05-13 9:11 ` Nadav Amit
2019-05-13 11:30 ` Peter Zijlstra
2019-05-13 16:37 ` Will Deacon
2019-05-13 17:06 ` Nadav Amit
2019-05-14 8:58 ` Mel Gorman
2019-05-13 9:12 ` Peter Zijlstra
2019-05-13 9:21 ` Nadav Amit
2019-05-13 11:27 ` Peter Zijlstra
2019-05-13 17:41 ` Nadav Amit
2019-05-09 18:22 ` Yang Shi
2019-05-09 19:56 ` Peter Zijlstra
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