From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7091C4363D for ; Thu, 24 Sep 2020 11:13:28 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 2975F239D4 for ; Thu, 24 Sep 2020 11:13:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2975F239D4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 57DF0900019; Thu, 24 Sep 2020 07:13:27 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 4DFFA900017; Thu, 24 Sep 2020 07:13:27 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 3A877900019; Thu, 24 Sep 2020 07:13:27 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0172.hostedemail.com [216.40.44.172]) by kanga.kvack.org (Postfix) with ESMTP id 20869900017 for ; Thu, 24 Sep 2020 07:13:27 -0400 (EDT) Received: from smtpin11.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id D4723181AE866 for ; Thu, 24 Sep 2020 11:13:26 +0000 (UTC) X-FDA: 77297694012.11.baby78_4806fc82715e Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin11.hostedemail.com (Postfix) with ESMTP id A3133180F8B80 for ; Thu, 24 Sep 2020 11:13:26 +0000 (UTC) X-HE-Tag: baby78_4806fc82715e X-Filterd-Recvd-Size: 3933 Received: from huawei.com (lhrrgout.huawei.com [185.176.76.210]) by imf12.hostedemail.com (Postfix) with ESMTP for ; Thu, 24 Sep 2020 11:13:26 +0000 (UTC) Received: from lhreml713-chm.china.huawei.com (unknown [172.18.7.107]) by Forcepoint Email with ESMTP id F173988DD8CE65492693; Thu, 24 Sep 2020 12:13:23 +0100 (IST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by lhreml713-chm.china.huawei.com (10.201.108.64) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Thu, 24 Sep 2020 12:13:23 +0100 Received: from lhreml710-chm.china.huawei.com ([169.254.81.184]) by lhreml710-chm.china.huawei.com ([169.254.81.184]) with mapi id 15.01.1913.007; Thu, 24 Sep 2020 12:13:23 +0100 From: Shameerali Kolothum Thodi To: Jean-Philippe Brucker CC: "iommu@lists.linux-foundation.org" , "linux-arm-kernel@lists.infradead.org" , "linux-mm@kvack.org" , "fenghua.yu@intel.com" , "catalin.marinas@arm.com" , Suzuki K Poulose , "robin.murphy@arm.com" , "zhangfei.gao@linaro.org" , "will@kernel.org" Subject: RE: [PATCH v10 10/13] iommu/arm-smmu-v3: Check for SVA features Thread-Topic: [PATCH v10 10/13] iommu/arm-smmu-v3: Check for SVA features Thread-Index: AQHWjaVYIOfN4SdH50ySUPU7pQ9X7Klyx0+AgATDYgCAAB0CgA== Date: Thu, 24 Sep 2020 11:13:23 +0000 Message-ID: <47b244b99f284790b82b2c0a968ba830@huawei.com> References: <20200918101852.582559-1-jean-philippe@linaro.org> <20200918101852.582559-11-jean-philippe@linaro.org> <753bcd76c21c4ea98ef1d4e492db01f4@huawei.com> <20200924101340.GC170808@myrica> In-Reply-To: <20200924101340.GC170808@myrica> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.47.86.144] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: > -----Original Message----- > From: Jean-Philippe Brucker [mailto:jean-philippe@linaro.org] > Sent: 24 September 2020 11:14 > To: Shameerali Kolothum Thodi > Cc: iommu@lists.linux-foundation.org; linux-arm-kernel@lists.infradead.or= g; > linux-mm@kvack.org; fenghua.yu@intel.com; catalin.marinas@arm.com; > Suzuki K Poulose ; robin.murphy@arm.com; > zhangfei.gao@linaro.org; will@kernel.org > Subject: Re: [PATCH v10 10/13] iommu/arm-smmu-v3: Check for SVA features >=20 > Hi Shameer, >=20 > On Mon, Sep 21, 2020 at 08:59:39AM +0000, Shameerali Kolothum Thodi > wrote: > > > +bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) > > > +{ > > > + unsigned long reg, fld; > > > + unsigned long oas; > > > + unsigned long asid_bits; > > > + u32 feat_mask =3D ARM_SMMU_FEAT_BTM | > > > ARM_SMMU_FEAT_COHERENCY; > > > > Why is BTM mandated for SVA? I couldn't find this requirement in SMMU s= pec > > (Sorry if I missed it or this got discussed earlier). But if performanc= e is the > only concern here, > > is it better just to allow it with a warning rather than limiting SMMUs= without > BTM? >=20 > It's a performance concern and requires to support multiple > configurations, but the spec allows it. Are there SMMUs without BTM that > need it? Ok. Thanks for clarifying. May be better to add a comment here. Our platfor= ms do support BTM, but I had a strange case where the UEFI didn't enable DVM but SMMU reported BTM and was causing random failures due to lack of explicit tlbi on mm invalidation. Anyway that doesn't count here :) Thanks, Shameer > Thanks, > Jean