From: Andrey Konovalov <andreyknvl@google.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>,
kasan-dev@googlegroups.com, Dmitry Vyukov <dvyukov@google.com>,
Andrey Ryabinin <aryabinin@virtuozzo.com>,
Alexander Potapenko <glider@google.com>,
Marco Elver <elver@google.com>,
Evgenii Stepanov <eugenis@google.com>,
Elena Petrova <lenaptr@google.com>,
Branislav Rankov <Branislav.Rankov@arm.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Andrew Morton <akpm@linux-foundation.org>,
linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
Andrey Konovalov <andreyknvl@google.com>
Subject: [PATCH v5 40/40] kselftest/arm64: Check GCR_EL1 after context switch
Date: Mon, 12 Oct 2020 22:44:46 +0200 [thread overview]
Message-ID: <6313d5b812ac46c4a0b45144e8ca2383cd560edd.1602535397.git.andreyknvl@google.com> (raw)
In-Reply-To: <cover.1602535397.git.andreyknvl@google.com>
From: Vincenzo Frascino <vincenzo.frascino@arm.com>
This test is specific to MTE and verifies that the GCR_EL1 register
is context switched correctly.
It spawn 1024 processes and each process spawns 5 threads. Each thread
writes a random setting of GCR_EL1 through the prctl() system call and
reads it back verifying that it is the same. If the values are not the
same it reports a failure.
Note: The test has been extended to verify that even SYNC and ASYNC mode
setting is preserved correctly over context switching.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
---
Change-Id: Ia917684a2b8e5f29e705ca5cbf360b010df6f61e
---
tools/testing/selftests/arm64/mte/Makefile | 2 +-
.../arm64/mte/check_gcr_el1_cswitch.c | 152 ++++++++++++++++++
2 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/arm64/mte/check_gcr_el1_cswitch.c
diff --git a/tools/testing/selftests/arm64/mte/Makefile b/tools/testing/selftests/arm64/mte/Makefile
index 2480226dfe57..0b3af552632a 100644
--- a/tools/testing/selftests/arm64/mte/Makefile
+++ b/tools/testing/selftests/arm64/mte/Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
# Copyright (C) 2020 ARM Limited
-CFLAGS += -std=gnu99 -I.
+CFLAGS += -std=gnu99 -I. -lpthread
SRCS := $(filter-out mte_common_util.c,$(wildcard *.c))
PROGS := $(patsubst %.c,%,$(SRCS))
diff --git a/tools/testing/selftests/arm64/mte/check_gcr_el1_cswitch.c b/tools/testing/selftests/arm64/mte/check_gcr_el1_cswitch.c
new file mode 100644
index 000000000000..55e33d96794c
--- /dev/null
+++ b/tools/testing/selftests/arm64/mte/check_gcr_el1_cswitch.c
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2020 ARM Limited
+
+#define _GNU_SOURCE
+
+#include <errno.h>
+#include <pthread.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <unistd.h>
+#include <sys/auxv.h>
+#include <sys/mman.h>
+#include <sys/prctl.h>
+#include <sys/types.h>
+#include <sys/wait.h>
+
+#include "kselftest.h"
+#include "mte_common_util.h"
+
+#define PR_SET_TAGGED_ADDR_CTRL 55
+#define PR_GET_TAGGED_ADDR_CTRL 56
+# define PR_TAGGED_ADDR_ENABLE (1UL << 0)
+# define PR_MTE_TCF_SHIFT 1
+# define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
+# define PR_MTE_TAG_SHIFT 3
+# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
+
+#include "mte_def.h"
+
+#define NUM_ITERATIONS 1024
+#define MAX_THREADS 5
+#define THREAD_ITERATIONS 1000
+
+void *execute_thread(void *x)
+{
+ pid_t pid = *((pid_t *)x);
+ pid_t tid = gettid();
+ uint64_t prctl_tag_mask;
+ uint64_t prctl_set;
+ uint64_t prctl_get;
+ uint64_t prctl_tcf;
+
+ srand(time(NULL) ^ (pid << 16) ^ (tid << 16));
+
+ prctl_tag_mask = rand() % 0xffff;
+
+ if (prctl_tag_mask % 2)
+ prctl_tcf = PR_MTE_TCF_SYNC;
+ else
+ prctl_tcf = PR_MTE_TCF_ASYNC;
+
+ prctl_set = PR_TAGGED_ADDR_ENABLE | prctl_tcf | (prctl_tag_mask << PR_MTE_TAG_SHIFT);
+
+ for (int j = 0; j < THREAD_ITERATIONS; j++) {
+ if (prctl(PR_SET_TAGGED_ADDR_CTRL, prctl_set, 0, 0, 0)) {
+ perror("prctl() failed");
+ goto fail;
+ }
+
+ prctl_get = prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0);
+
+ if (prctl_set != prctl_get) {
+ ksft_print_msg("Error: prctl_set: 0x%lx != prctl_get: 0x%lx\n",
+ prctl_set, prctl_get);
+ goto fail;
+ }
+ }
+
+ return (void *)KSFT_PASS;
+
+fail:
+ return (void *)KSFT_FAIL;
+}
+
+int execute_test(pid_t pid)
+{
+ pthread_t thread_id[MAX_THREADS];
+ int thread_data[MAX_THREADS];
+
+ for (int i = 0; i < MAX_THREADS; i++)
+ pthread_create(&thread_id[i], NULL,
+ execute_thread, (void *)&pid);
+
+ for (int i = 0; i < MAX_THREADS; i++)
+ pthread_join(thread_id[i], (void *)&thread_data[i]);
+
+ for (int i = 0; i < MAX_THREADS; i++)
+ if (thread_data[i] == KSFT_FAIL)
+ return KSFT_FAIL;
+
+ return KSFT_PASS;
+}
+
+int mte_gcr_fork_test()
+{
+ pid_t pid[NUM_ITERATIONS];
+ int results[NUM_ITERATIONS];
+ pid_t cpid;
+ int res;
+
+ for (int i = 0; i < NUM_ITERATIONS; i++) {
+ pid[i] = fork();
+
+ if (pid[i] == 0) {
+ cpid = getpid();
+
+ res = execute_test(cpid);
+
+ exit(res);
+ }
+ }
+
+ for (int i = 0; i < NUM_ITERATIONS; i++) {
+ wait(&res);
+
+ if(WIFEXITED(res))
+ results[i] = WEXITSTATUS(res);
+ else
+ --i;
+ }
+
+ for (int i = 0; i < NUM_ITERATIONS; i++)
+ if (results[i] == KSFT_FAIL)
+ return KSFT_FAIL;
+
+ return KSFT_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ int err;
+
+ err = mte_default_setup();
+ if (err)
+ return err;
+
+ ksft_set_plan(1);
+
+ evaluate_test(mte_gcr_fork_test(),
+ "Verify that GCR_EL1 is set correctly on context switch\n");
+
+ mte_restore_setup();
+ ksft_print_cnts();
+
+ return ksft_get_fail_cnt() == 0 ? KSFT_PASS : KSFT_FAIL;
+}
+
--
2.28.0.1011.ga647a8990f-goog
prev parent reply other threads:[~2020-10-12 20:46 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 20:44 [PATCH v5 00/40] kasan: add hardware tag-based mode for arm64 Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 01/40] arm64: Enable armv8.5-a asm-arch option Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 02/40] arm64: mte: Add in-kernel MTE helpers Andrey Konovalov
2020-10-28 11:28 ` Dmitry Vyukov
2020-10-29 16:50 ` Andrey Konovalov
2020-11-04 17:49 ` Vincenzo Frascino
2020-10-12 20:44 ` [PATCH v5 03/40] arm64: mte: Reset the page tag in page->flags Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 04/40] arm64: kasan: Add arch layer for memory tagging helpers Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 05/40] arm64: mte: Add in-kernel tag fault handler Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 06/40] arm64: kasan: Enable in-kernel MTE Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 07/40] arm64: mte: Convert gcr_user into an exclude mask Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 08/40] arm64: mte: Switch GCR_EL1 in kernel entry and exit Andrey Konovalov
2020-10-28 10:06 ` Dmitry Vyukov
2020-10-29 16:52 ` Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 09/40] arm64: kasan: Align allocations for HW_TAGS Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 10/40] kasan: drop unnecessary GPL text from comment headers Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 11/40] kasan: KASAN_VMALLOC depends on KASAN_GENERIC Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 12/40] kasan: group vmalloc code Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 13/40] kasan: shadow declarations only for software modes Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 14/40] kasan: rename (un)poison_shadow to (un)poison_memory Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 15/40] kasan: rename KASAN_SHADOW_* to KASAN_GRANULE_* Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 16/40] kasan: only build init.c for software modes Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 17/40] kasan: split out shadow.c from common.c Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 18/40] kasan: define KASAN_GRANULE_PAGE Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 19/40] kasan: rename report and tags files Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 20/40] kasan: don't duplicate config dependencies Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 21/40] kasan: hide invalid free check implementation Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 22/40] kasan: decode stack frame only with KASAN_STACK_ENABLE Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 23/40] kasan, arm64: only init shadow for software modes Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 24/40] kasan, arm64: only use kasan_depth " Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 25/40] kasan: rename addr_has_shadow to addr_has_metadata Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 26/40] kasan: rename print_shadow_for_address to print_memory_metadata Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 27/40] kasan: kasan_non_canonical_hook only for software modes Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 28/40] kasan: rename SHADOW layout macros to META Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 29/40] kasan: separate metadata_fetch_row for each mode Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 30/40] kasan, arm64: don't allow SW_TAGS with ARM64_MTE Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 31/40] kasan: introduce CONFIG_KASAN_HW_TAGS Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 32/40] kasan: define KASAN_GRANULE_SIZE for HW_TAGS Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 33/40] kasan, x86, s390: update undef CONFIG_KASAN Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 34/40] kasan, arm64: expand CONFIG_KASAN checks Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 35/40] kasan, arm64: implement HW_TAGS runtime Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 36/40] kasan, arm64: print report from tag fault handler Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 37/40] kasan, mm: reset tags when accessing metadata Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 38/40] kasan, arm64: enable CONFIG_KASAN_HW_TAGS Andrey Konovalov
2020-10-12 20:44 ` [PATCH v5 39/40] kasan: add documentation for hardware tag-based mode Andrey Konovalov
2020-10-12 20:44 ` Andrey Konovalov [this message]
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