From: Luis Machado <luis.machado@linaro.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org,
linux-arch@vger.kernel.org, Will Deacon <will@kernel.org>,
Dave P Martin <Dave.Martin@arm.com>,
Vincenzo Frascino <vincenzo.frascino@arm.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Andrey Konovalov <andreyknvl@google.com>,
Peter Collingbourne <pcc@google.com>,
Andrew Morton <akpm@linux-foundation.org>,
Alan Hayward <Alan.Hayward@arm.com>,
Omair Javaid <omair.javaid@linaro.org>
Subject: Re: [PATCH v5 19/25] arm64: mte: Add PTRACE_{PEEK,POKE}MTETAGS support
Date: Wed, 1 Jul 2020 14:32:43 -0300 [thread overview]
Message-ID: <8fa5c891-0f4a-c925-679e-94c41a546490@linaro.org> (raw)
In-Reply-To: <20200701171549.GF5191@gaia>
Hi,
On 7/1/20 2:16 PM, Catalin Marinas wrote:
> Hi Luis,
>
> On Thu, Jun 25, 2020 at 02:10:10PM -0300, Luis Machado wrote:
>> I have one point below I wanted to clarify regarding
>> PEEKMTETAGS/POKEMTETAGS.
>>
>> But before that, I've pushed v2 of the MTE series for GDB here:
>>
>> https://sourceware.org/git/?p=binutils-gdb.git;a=shortlog;h=refs/heads/users/luisgpm/aarch64-mte-v2
>>
>> That series adds sctlr and gcr registers to the NT_ARM_MTE (still using a
>> dummy value of 0x407) register set. It would be nice if the Linux Kernel and
>> the debuggers were in sync in terms of supporting this new register set. GDB
>> assumes the register set exists if HWCAP2_MTE is there.
>>
>> So, if we want to adjust the register set, we should probably consider doing
>> that now. That prevents the situation where debuggers would need to do
>> another check to confirm NT_ARM_MTE is exported. I'd rather avoid that.
>
> I'm happy to do this before merging, though we need to agree on the
> semantics.
>
> Do you need both read and write access? Also wondering whether the
If I recall the previous discussion correctly, Kevin thought access to
both of these would be interesting to the user. It sounded like having
read-only access was enough. If so,...
> prctl() value would be a better option than the raw register bits (well,
> not entirely raw, masking out the irrelevant part).
... then exposing the most useful bits to the user would be better, and
up to you to define.
I can tweak the GDB patches to turn the sctlr and gcr values into flag
fields. Then GDB can just show those in a more meaningful way. I just
need to know what the bits would look like.
I'd rather not make these values writable if we don't think there is a
good use case for it. Better avoid giving developers more knobs than
they need?
next prev parent reply other threads:[~2020-07-01 17:32 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-24 17:52 [PATCH v5 00/25] arm64: Memory Tagging Extension user-space support Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 01/25] arm64: mte: system register definitions Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 02/25] arm64: mte: CPU feature detection and initial sysreg configuration Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 03/25] arm64: mte: Use Normal Tagged attributes for the linear map Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 04/25] arm64: mte: Add specific SIGSEGV codes Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 05/25] arm64: mte: Handle synchronous and asynchronous tag check faults Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 06/25] mm: Add PG_ARCH_2 page flag Catalin Marinas
2020-06-24 18:33 ` Andrew Morton
2020-06-24 18:36 ` Matthew Wilcox
2020-06-25 17:10 ` Catalin Marinas
2020-07-01 17:30 ` Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 07/25] arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 08/25] arm64: mte: Tags-aware copy_{user_,}highpage() implementations Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 09/25] arm64: Avoid unnecessary clear_user_page() indirection Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 10/25] arm64: mte: Tags-aware aware memcmp_pages() implementation Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 11/25] mm: Introduce arch_calc_vm_flag_bits() Catalin Marinas
2020-06-24 18:36 ` Andrew Morton
2020-06-25 17:34 ` Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 12/25] arm64: mte: Add PROT_MTE support to mmap() and mprotect() Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 13/25] mm: Introduce arch_validate_flags() Catalin Marinas
2020-06-24 18:37 ` Andrew Morton
2020-06-24 17:52 ` [PATCH v5 14/25] arm64: mte: Validate the PROT_MTE request via arch_validate_flags() Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 15/25] mm: Allow arm64 mmap(PROT_MTE) on RAM-based files Catalin Marinas
2020-06-24 18:42 ` Andrew Morton
2020-06-24 17:52 ` [PATCH v5 16/25] arm64: mte: Allow user control of the tag check mode via prctl() Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 17/25] arm64: mte: Allow user control of the generated random tags " Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 18/25] arm64: mte: Restore the GCR_EL1 register after a suspend Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 19/25] arm64: mte: Add PTRACE_{PEEK,POKE}MTETAGS support Catalin Marinas
2020-06-25 17:10 ` Luis Machado
2020-07-01 17:16 ` Catalin Marinas
2020-07-01 17:32 ` Luis Machado [this message]
2020-07-03 13:18 ` Catalin Marinas
2020-07-03 10:50 ` Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 20/25] fs: Handle intra-page faults in copy_mount_options() Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 21/25] mm: Add arch hooks for saving/restoring tags Catalin Marinas
2020-06-24 18:45 ` Andrew Morton
2020-06-25 9:04 ` Steven Price
2020-06-25 12:09 ` Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 22/25] arm64: mte: Enable swap of tagged pages Catalin Marinas
2020-06-25 11:37 ` Steven Price
2020-06-25 11:59 ` Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 23/25] arm64: mte: Save tags when hibernating Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 24/25] arm64: mte: Kconfig entry Catalin Marinas
2020-06-24 17:52 ` [PATCH v5 25/25] arm64: mte: Add Memory Tagging Extension documentation Catalin Marinas
2020-06-25 12:22 ` Szabolcs Nagy
2020-06-26 14:54 ` Catalin Marinas
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