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From: Dmitry Vyukov <dvyukov@google.com>
To: Andrey Ryabinin <aryabinin@virtuozzo.com>
Cc: "Kirill A. Shutemov" <kirill@shutemov.name>,
	Alexander Potapenko <glider@google.com>,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	"x86@kernel.org" <x86@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	Andi Kleen <ak@linux.intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Andy Lutomirski <luto@amacapital.net>,
	linux-arch@vger.kernel.org,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	LKML <linux-kernel@vger.kernel.org>,
	kasan-dev <kasan-dev@googlegroups.com>
Subject: Re: KASAN vs. boot-time switching between 4- and 5-level paging
Date: Mon, 29 May 2017 13:19:59 +0200	[thread overview]
Message-ID: <CACT4Y+bSTOeJtDDZVmkff=qqJFesA_b6uTG__EAn4AvDLw0jzQ@mail.gmail.com> (raw)
In-Reply-To: <71e11033-f95c-887f-4e4e-351bcc3df71e@virtuozzo.com>

On Mon, May 29, 2017 at 1:18 PM, Andrey Ryabinin
<aryabinin@virtuozzo.com> wrote:
>
>
> On 05/29/2017 01:02 PM, Dmitry Vyukov wrote:
>> On Sat, May 27, 2017 at 12:10 AM, Kirill A. Shutemov
>> <kirill@shutemov.name> wrote:
>>> On Thu, May 25, 2017 at 11:33:33PM +0300, Kirill A. Shutemov wrote:
>>>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>>>> index 0bf81e837cbf..c795207d8a3c 100644
>>>> --- a/arch/x86/Kconfig
>>>> +++ b/arch/x86/Kconfig
>>>> @@ -100,7 +100,7 @@ config X86
>>>>       select HAVE_ARCH_AUDITSYSCALL
>>>>       select HAVE_ARCH_HUGE_VMAP              if X86_64 || X86_PAE
>>>>       select HAVE_ARCH_JUMP_LABEL
>>>> -     select HAVE_ARCH_KASAN                  if X86_64 && SPARSEMEM_VMEMMAP
>>>> +     select HAVE_ARCH_KASAN                  if X86_64 && SPARSEMEM_VMEMMAP && !X86_5LEVEL
>>>>       select HAVE_ARCH_KGDB
>>>>       select HAVE_ARCH_KMEMCHECK
>>>>       select HAVE_ARCH_MMAP_RND_BITS          if MMU
>>>
>>> Looks like KASAN will be a problem for boot-time paging mode switching.
>>> It wants to know CONFIG_KASAN_SHADOW_OFFSET at compile-time to pass to
>>> gcc -fasan-shadow-offset=. But this value varies between paging modes...
>>>
>>> I don't see how to solve it. Folks, any ideas?
>>
>> +kasan-dev
>>
>> I wonder if we can use the same offset for both modes. If we use
>> 0xFFDFFC0000000000 as start of shadow for 5 levels, then the same
>> offset that we use for 4 levels (0xdffffc0000000000) will also work
>> for 5 levels. Namely, ending of 5 level shadow will overlap with 4
>> level mapping (both end at 0xfffffbffffffffff), but 5 level mapping
>> extends towards lower addresses. The current 5 level start of shadow
>> is actually close -- 0xffd8000000000000 and it seems that the required
>> space after it is unused at the moment (at least looking at mm.txt).
>> So just try to move it to 0xFFDFFC0000000000?
>>
>
> Yeah, this should work, but note that 0xFFDFFC0000000000 is not PGDIR aligned address. Our init code
> assumes that kasan shadow stars and ends on the PGDIR aligned address.
> Fortunately this is fixable, we'd need two more pages for page tables to map unaligned start/end
> of the shadow.

I think we can extend the shadow backwards (to the current address),
provided that it does not affect shadow offset that we pass to
compiler.

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  reply	other threads:[~2017-05-29 11:20 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-25 20:33 [PATCHv1, RFC 0/8] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-05-25 20:33 ` [PATCHv1, RFC 1/8] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-05-25 20:33 ` [PATCHv1, RFC 2/8] x86/mm: Make virtual memory layout movable for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-05-25 20:33 ` [PATCHv1, RFC 3/8] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable Kirill A. Shutemov
2017-05-25 20:33 ` [PATCHv1, RFC 4/8] x86/mm: Handle boot-time paging mode switching at early boot Kirill A. Shutemov
2017-05-25 20:33 ` [PATCHv1, RFC 5/8] x86/mm: Fold p4d page table layer at runtime Kirill A. Shutemov
2017-05-27 15:09   ` Brian Gerst
2017-05-27 22:46     ` Kirill A. Shutemov
2017-05-27 22:56       ` Brian Gerst
2017-05-25 20:33 ` [PATCHv1, RFC 6/8] x86/mm: Replace compile-time checks for 5-level with runtime-time Kirill A. Shutemov
2017-05-25 20:33 ` [PATCHv1, RFC 7/8] x86/mm: Hacks for boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-05-26 22:10   ` KASAN vs. " Kirill A. Shutemov
2017-05-29 10:02     ` Dmitry Vyukov
2017-05-29 11:18       ` Andrey Ryabinin
2017-05-29 11:19         ` Dmitry Vyukov [this message]
2017-05-29 11:45           ` Andrey Ryabinin
2017-05-29 12:46             ` Andrey Ryabinin
2017-06-01 14:56               ` Andrey Ryabinin
2017-07-10 12:33                 ` Kirill A. Shutemov
2017-07-10 12:43                   ` Dmitry Vyukov
2017-07-10 14:17                     ` Kirill A. Shutemov
2017-07-10 15:56                       ` Andy Lutomirski
2017-07-10 18:47                         ` Kirill A. Shutemov
2017-07-10 20:07                           ` Andy Lutomirski
2017-07-10 21:24                             ` Kirill A. Shutemov
2017-07-11  0:30                               ` Andy Lutomirski
2017-07-11 10:35                                 ` Kirill A. Shutemov
2017-07-11 15:06                                   ` Andy Lutomirski
2017-07-11 15:15                                     ` Andrey Ryabinin
2017-07-11 16:45                                       ` Andrey Ryabinin
2017-07-11 17:03                                         ` Kirill A. Shutemov
2017-07-11 17:29                                           ` Andrey Ryabinin
2017-07-11 19:05                                             ` Kirill A. Shutemov
2017-07-13 12:58                                               ` Andrey Ryabinin
2017-07-13 13:52                                                 ` Kirill A. Shutemov
2017-07-13 14:15                                                   ` Kirill A. Shutemov
2017-07-13 14:19                                                     ` Andrey Ryabinin
2017-07-24 12:13                                                       ` Kirill A. Shutemov
2017-07-24 14:07                                                         ` Andrey Ryabinin
2017-07-10 16:57                   ` Andrey Ryabinin
2017-05-25 20:33 ` [PATCHv1, RFC 8/8] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y Kirill A. Shutemov
2017-05-25 23:24 ` [PATCHv1, RFC 0/8] Boot-time switching between 4- and 5-level paging Linus Torvalds
2017-05-26  0:40   ` Andy Lutomirski
2017-05-26  4:18     ` Kevin Easton
2017-05-26  7:21       ` Andy Lutomirski
2017-05-26 13:00   ` Kirill A. Shutemov
2017-05-26 13:35     ` Andi Kleen
2017-05-26 15:51     ` Linus Torvalds
2017-05-26 15:58       ` Kirill A. Shutemov
2017-05-26 16:13         ` Linus Torvalds
2017-05-26 18:24       ` hpa
2017-05-26 19:23         ` Dave Hansen
2017-05-26 19:36           ` hpa
2017-05-26 19:40     ` hpa

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