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From: Andy Lutomirski <luto@kernel.org>
Date: Thu, 13 Jul 2017 10:15:15 -0700
Message-ID: <CALCETrXm8GXXgbXOw8DKL2O9fWfyv2CzExwCLR+6kHLELPsP3Q@mail.gmail.com>
Subject: Re: Potential race in TLB flush batching?
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Sender: owner-linux-mm@kvack.org
List-ID: <linux-mm.kvack.org>
To: Mel Gorman <mgorman@suse.de>
Cc: Andy Lutomirski <luto@kernel.org>, Nadav Amit <nadav.amit@gmail.com>, "open list:MEMORY MANAGEMENT" <linux-mm@kvack.org>

On Thu, Jul 13, 2017 at 10:07 AM, Mel Gorman <mgorman@suse.de> wrote:
> On Thu, Jul 13, 2017 at 09:08:21AM -0700, Andrew Lutomirski wrote:
>> On Wed, Jul 12, 2017 at 11:07 PM, Mel Gorman <mgorman@suse.de> wrote:
>> > --- a/arch/x86/mm/tlb.c
>> > +++ b/arch/x86/mm/tlb.c
>> > @@ -455,6 +455,39 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
>> >         put_cpu();
>> >  }
>> >
>> > +/*
>> > + * Ensure that any arch_tlbbatch_add_mm calls on this mm are up to date when
>>
>> s/are up to date/have flushed the TLBs/ perhaps?
>>
>>
>> Can you update this comment in arch/x86/include/asm/tlbflush.h:
>>
>>          * - Fully flush a single mm.  .mm will be set, .end will be
>>          *   TLB_FLUSH_ALL, and .new_tlb_gen will be the tlb_gen to
>>          *   which the IPI sender is trying to catch us up.
>>
>> by adding something like: This can also happen due to
>> arch_tlbflush_flush_one_mm(), in which case it's quite likely that
>> most or all CPUs are already up to date.
>>
>
> No problem, thanks. Care to ack the patch below? If so, I'll send it
> to Ingo with x86 and linux-mm cc'd after some tests complete (hopefully
> successfully). It's fairly x86 specific and makes sense to go in with the
> rest of the pcid and mm tlb_gen stuff rather than via Andrew's tree even
> through it touches core mm.

Acked-by: Andy Lutomirski <luto@kernel.org> # for the x86 parts

When you send to Ingo, you might want to change
arch_tlbbatch_flush_one_mm to arch_tlbbatch_flush_one_mm(), because
otherwise he'll probably do it for you :)

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