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[209.85.220.65]) by mx.google.com with SMTPS id h187sor4324870oib.95.2019.06.10.16.21.29 for (Google Transport Security); Mon, 10 Jun 2019 16:21:29 -0700 (PDT) Received-SPF: pass (google.com: domain of hjl.tools@gmail.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=XQq46nLU; spf=pass (google.com: domain of hjl.tools@gmail.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=hjl.tools@gmail.com; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ZaE9J9S5+4tokzmlUvtvROgLbYm6CbLOjAt2bzs6+ko=; b=XQq46nLUk1w0so/Oo7f4Obzwh/o1q87LWsXwXUYuy18n6wtiBRK2ftGBmxm0auLw3C 2yYiVAkdcv6+/IVh7X6QrM0UoSGQyitdM1QDCifV12RE9hSZfSNyJQrEQfP2SMg4enWZ 9LDHi3uZQaqUAoUSQ0q3cxiPm+2hhlnnol/CR7tdZmeUtkO7SxOTVDda6RZ80MibiTWD lnM9MHvgLA0qymLGPVIp3eSUnd1KmStoOEVcrMnZzpgJDMBk/K3h1H5rHaQxobmMSEsZ 7xq5E1OCNHUfIZU9DJSeMtA0aMcMep/1d7coTjVhV//p15VgmmRXrPIBHbhiOyr1iHtd A5xA== X-Google-Smtp-Source: APXvYqzb5bNwl6WsntXoXRG9f925hb0b4zMvZ1roOsKlf05inct+tI9izH6k+IgRME05YsAxf20EyAgYGYpegeQTvhQ= X-Received: by 2002:aca:c508:: with SMTP id v8mr13855096oif.104.1560208888753; Mon, 10 Jun 2019 16:21:28 -0700 (PDT) MIME-Version: 1.0 References: <20190606200926.4029-1-yu-cheng.yu@intel.com> <20190606200926.4029-4-yu-cheng.yu@intel.com> <20190607080832.GT3419@hirez.programming.kicks-ass.net> <20190607174336.GM3436@hirez.programming.kicks-ass.net> <34E0D316-552A-401C-ABAA-5584B5BC98C5@amacapital.net> <7e0b97bf1fbe6ff20653a8e4e147c6285cc5552d.camel@intel.com> <25281DB3-FCE4-40C2-BADB-B3B05C5F8DD3@amacapital.net> <3f19582d-78b1-5849-ffd0-53e8ca747c0d@intel.com> <5aa98999b1343f34828414b74261201886ec4591.camel@intel.com> <0665416d-9999-b394-df17-f2a5e1408130@intel.com> <5c8727dde9653402eea97bfdd030c479d1e8dd99.camel@intel.com> <328275c9b43c06809c9937c83d25126a6e3efcbd.camel@intel.com> <92e56b28-0cd4-e3f4-867b-639d9b98b86c@intel.com> <1b961c71d30e31ecb22da2c5401b1a81cb802d86.camel@intel.com> In-Reply-To: From: "H.J. Lu" Date: Mon, 10 Jun 2019 16:20:52 -0700 Message-ID: Subject: Re: [PATCH v7 03/14] x86/cet/ibt: Add IBT legacy code bitmap setup function To: Dave Hansen Cc: Yu-cheng Yu , Andy Lutomirski , Peter Zijlstra , "the arch/x86 maintainers" , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , LKML , linux-doc@vger.kernel.org, Linux-MM , linux-arch , Linux API , Arnd Bergmann , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Jun 10, 2019 at 3:59 PM Dave Hansen wrote: > > > We then create PR_MARK_CODE_AS_LEGACY. The kernel will set the bitmap, but it > > is going to be slow. > > Slow compared to what? We're effectively adding one (quick) system call > to a path that, today, has at *least* half a dozen syscalls and probably > a bunch of page faults. Heck, we can probably avoid the actual page > fault to populate the bitmap if we're careful. That alone would put a > syscall on equal footing with any other approach. If the bit setting > crossed a page boundary it would probably win. > > > Perhaps we still let the app fill the bitmap? > > I think I'd want to see some performance data on it first. Updating legacy bitmap in user space from kernel requires long q; get_user(q, ...); q |= mask; put_user(q, ...); instead of *p |= mask; get_user + put_user was quite slow when we tried before. -- H.J.