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[24.6.216.183]) by smtp.gmail.com with ESMTPSA id v10sm32697pjr.47.2021.01.12.14.29.52 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Jan 2021 14:29:53 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 13.4 \(3608.120.23.2.4\)) Subject: Re: [PATCH] mm/userfaultfd: fix memory corruption due to writeprotect From: Nadav Amit In-Reply-To: <20210112214337.GA10434@willie-the-truck> Date: Tue, 12 Jan 2021 14:29:51 -0800 Cc: Yu Zhao , Laurent Dufour , Peter Zijlstra , Vinayak Menon , Linus Torvalds , Andy Lutomirski , Peter Xu , Andrea Arcangeli , linux-mm , lkml , Pavel Emelyanov , Mike Kravetz , Mike Rapoport , stable , Minchan Kim , surenb@google.com Content-Transfer-Encoding: 7bit Message-Id: References: <20210105153727.GK3040@hirez.programming.kicks-ass.net> <0201238b-e716-2a3c-e9ea-d5294ff77525@linux.vnet.ibm.com> <2C7AE23B-ACA3-4D55-A907-AF781C5608F0@gmail.com> <20210112214337.GA10434@willie-the-truck> To: Will Deacon X-Mailer: Apple Mail (2.3608.120.23.2.4) X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: > On Jan 12, 2021, at 1:43 PM, Will Deacon wrote: > > On Tue, Jan 12, 2021 at 12:38:34PM -0800, Nadav Amit wrote: >>> On Jan 12, 2021, at 11:56 AM, Yu Zhao wrote: >>> On Tue, Jan 12, 2021 at 11:15:43AM -0800, Nadav Amit wrote: >>>> I will send an RFC soon for per-table deferred TLB flushes tracking. >>>> The basic idea is to save a generation in the page-struct that tracks >>>> when deferred PTE change took place, and track whenever a TLB flush >>>> completed. In addition, other users - such as mprotect - would use >>>> the tlb_gather interface. >>>> >>>> Unfortunately, due to limited space in page-struct this would only >>>> be possible for 64-bit (and my implementation is only for x86-64). >>> >>> I don't want to discourage you but I don't think this would end up >>> well. PPC doesn't necessarily follow one-page-struct-per-table rule, >>> and I've run into problems with this before while trying to do >>> something similar. >> >> Discourage, discourage. Better now than later. >> >> It will be relatively easy to extend the scheme to be per-VMA instead of >> per-table for architectures that prefer it this way. It does require >> TLB-generation tracking though, which Andy only implemented for x86, so I >> will focus on x86-64 right now. > > Can you remind me of what we're missing on arm64 in this area, please? I'm > happy to help get this up and running once you have something I can build > on. Let me first finish making something that we can use as a basis for a discussion. I do not waste your time before I have something ready.