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[2a0a:51c0:0:12e:550::1]) by mx.google.com with ESMTPS id 90si9510560wrg.260.2019.07.12.08.23.52 for (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 12 Jul 2019 08:23:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a0a:51c0:0:12e:550::1 as permitted sender) client-ip=2a0a:51c0:0:12e:550::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of tglx@linutronix.de designates 2a0a:51c0:0:12e:550::1 as permitted sender) smtp.mailfrom=tglx@linutronix.de Received: from [5.158.153.52] (helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1hlxOi-0003SX-Ud; Fri, 12 Jul 2019 17:23:45 +0200 Date: Fri, 12 Jul 2019 17:23:44 +0200 (CEST) From: Thomas Gleixner To: Alexandre Chartre cc: Dave Hansen , pbonzini@redhat.com, rkrcmar@redhat.com, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, kvm@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, konrad.wilk@oracle.com, jan.setjeeilers@oracle.com, liran.alon@oracle.com, jwadams@google.com, graf@amazon.de, rppt@linux.vnet.ibm.com Subject: Re: [RFC v2 00/27] Kernel Address Space Isolation In-Reply-To: Message-ID: References: <1562855138-19507-1-git-send-email-alexandre.chartre@oracle.com> <5cab2a0e-1034-8748-fcbe-a17cf4fa2cd4@intel.com> <2791712a-9f7b-18bc-e686-653181461428@oracle.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Fri, 12 Jul 2019, Alexandre Chartre wrote: > On 7/12/19 3:51 PM, Dave Hansen wrote: > > BTW, the PTI CR3 writes are not *strictly* about the interrupt coming > > from user vs. kernel. It's tricky because there's a window both in the > > entry and exit code where you are in the kernel but have a userspace CR3 > > value. You end up needing a CR3 write when you have a userspace CR3 > > value when the interrupt occurred, not only when you interrupt userspace > > itself. > > > > Right. ASI is simpler because it comes from the kernel and return to the > kernel. There's just a small window (on entry) where we have the ASI CR3 > but we quickly switch to the full kernel CR3. That's wrong in several aspects. 1) You are looking at it purely from the VMM perspective, which is bogus as you already said, that this can/should be used to be extended to other scenarios (including kvm ioctl or such). So no, it's not just coming from kernel space and returning to it. If that'd be true then the entry code could just stay as is because you can handle _ALL_ of that very trivial in the atomic VMM enter/exit code. 2) It does not matter how small that window is. If there is a window then this needs to be covered, no matter what. Thanks, tglx