From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97A05C8300A for ; Wed, 29 Apr 2020 23:02:34 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 5BDD1208E0 for ; Wed, 29 Apr 2020 23:02:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5BDD1208E0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id E93628E0005; Wed, 29 Apr 2020 19:02:33 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id E44C88E0001; Wed, 29 Apr 2020 19:02:33 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id D33848E0005; Wed, 29 Apr 2020 19:02:33 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0179.hostedemail.com [216.40.44.179]) by kanga.kvack.org (Postfix) with ESMTP id BAD328E0001 for ; Wed, 29 Apr 2020 19:02:33 -0400 (EDT) Received: from smtpin24.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id 7209282499A8 for ; Wed, 29 Apr 2020 23:02:33 +0000 (UTC) X-FDA: 76762418586.24.pot22_3357c5d056450 X-HE-Tag: pot22_3357c5d056450 X-Filterd-Recvd-Size: 3719 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by imf24.hostedemail.com (Postfix) with ESMTP for ; Wed, 29 Apr 2020 23:02:32 +0000 (UTC) IronPort-SDR: eIf0oDFW8DUxfiQXq+v+IKb3aOeKHirtb8T18TvVFidh2ZLmw/6XQobPO678oyIHnMp351RtqL 2KdokSpAe5Jw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2020 16:02:31 -0700 IronPort-SDR: vaokhmIa5VvUIIGTviyZG7HRd2E2dm4X6gRMTkTynFEuEdgrWdwd8jJvVqbzFY+T805xnbtKLB MEqgunexeidg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,333,1583222400"; d="scan'208";a="405202065" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by orsmga004.jf.intel.com with ESMTP; 29 Apr 2020 16:02:30 -0700 Message-ID: Subject: Re: [PATCH v10 01/26] Documentation/x86: Add CET description From: Yu-cheng Yu To: Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang Date: Wed, 29 Apr 2020 16:02:33 -0700 In-Reply-To: References: <20200429220732.31602-1-yu-cheng.yu@intel.com> <20200429220732.31602-2-yu-cheng.yu@intel.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.32.4 (3.32.4-1.fc30) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Wed, 2020-04-29 at 15:53 -0700, Dave Hansen wrote: > On 4/29/20 3:07 PM, Yu-cheng Yu wrote: > > +Note: > > + There is no CET-enabling arch_prctl function. By design, CET is enabled > > + automatically if the binary and the system can support it. > > I think Andy and I danced around this last time. Let me try to say it > more explicitly. > > I want CET kernel enabling to able to be disconnected from the on-disk > binary. I want a binary compiled with CET to be able to disable it, and > I want a binary not compiled with CET to be able to enable it. I want > different threads in a process to be able to each have different CET status. The kernel patches we have now can be modified to support this model. If after discussion this is favorable, I will modify code accordingly. > Which JITs was this tested with? I think as a bare minimum we need to > know that this design can accommodate _a_ modern JIT. It would be > horrible if the browser javascript engines couldn't use this design, for > instance. JIT work is still in progress. When that is available I will test it. Yu-cheng