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From: Wenbin Mei <wenbin.mei@mediatek.com>
To: Ulf Hansson <ulf.hansson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: Chaotian Jing <chaotian.jing@mediatek.com>,
	Avri Altman <avri.altman@wdc.com>,
	Wenbin Mei <wenbin.mei@mediatek.com>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Yue Hu <huyue2@yulong.com>, Bean Huo <beanhuo@micron.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	<linux-mmc@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, "Rob Herring" <robh@kernel.org>
Subject: [PATCH v4 1/3] dt-bindings: mmc: mtk-sd: add hs400 dly3 setting
Date: Fri, 17 Sep 2021 20:38:49 +0800	[thread overview]
Message-ID: <20210917123851.22741-2-wenbin.mei@mediatek.com> (raw)
In-Reply-To: <20210917123851.22741-1-wenbin.mei@mediatek.com>

Add hs400 dly3 setting for mtk-sd yaml

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index e866e985549e..82768a807294 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -119,6 +119,18 @@ properties:
       If present, HS400 command responses are sampled on rising edges.
       If not present, HS400 command responses are sampled on falling edges.
 
+  mediatek,hs400-ds-dly3:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Gear of the third delay line for DS for input data latch in data
+      pad macro, there are 32 stages from 0 to 31.
+      For different corner IC, the time is different about one step, it is
+      about 100ps.
+      The value is confirmed by doing scan and calibration to find a best
+      value with corner IC and it is valid only for HS400 mode.
+    minimum: 0
+    maximum: 31
+
   mediatek,latch-ck:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
-- 
2.25.1


  reply	other threads:[~2021-09-17 12:39 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-17 12:38 [PATCH v4 0/3] mmc: mediatek: Add HS400 online tuning support Wenbin Mei
2021-09-17 12:38 ` Wenbin Mei [this message]
2021-09-17 12:38 ` [PATCH 2/3] mmc: core: add tuning support for HS400 mode Wenbin Mei
2021-09-17 12:38 ` [PATCH 3/3] mmc: mediatek: Add HS400 online tuning support Wenbin Mei

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