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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id x9-20020a4a8689000000b0051d13098c54sm3139588ooh.19.2023.02.27.14.29.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 14:29:05 -0800 (PST) Received: (nullmailer pid 1215162 invoked by uid 1000); Mon, 27 Feb 2023 22:29:04 -0000 Date: Mon, 27 Feb 2023 16:29:04 -0600 From: Rob Herring To: William Qiu Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 4/4] dt-bindings: syscon: Add StarFive syscon doc Message-ID: <20230227222904.GC1048218-robh@kernel.org> References: <20230215113249.47727-1-william.qiu@starfivetech.com> <20230215113249.47727-5-william.qiu@starfivetech.com> <20230220234335.GA615198-robh@kernel.org> <348796cc-72d9-4dcf-9f09-4c2aa55cb858@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <348796cc-72d9-4dcf-9f09-4c2aa55cb858@starfivetech.com> Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org On Tue, Feb 21, 2023 at 10:44:02AM +0800, William Qiu wrote: > > > On 2023/2/21 7:43, Rob Herring wrote: > > On Wed, Feb 15, 2023 at 07:32:49PM +0800, William Qiu wrote: > >> Add documentation to describe StarFive System Controller Registers. > >> > >> Signed-off-by: William Qiu > >> --- > >> .../bindings/soc/starfive/jh7110-syscon.yaml | 51 +++++++++++++++++++ > >> MAINTAINERS | 5 ++ > >> 2 files changed, 56 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >> > >> diff --git a/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >> new file mode 100644 > >> index 000000000000..fa4d8522a454 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml > >> @@ -0,0 +1,51 @@ > >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/soc/starfive/jh7110-syscon.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: StarFive JH7110 SoC system controller > >> + > >> +maintainers: > >> + - William Qiu > >> + > >> +description: | > >> + The StarFive JH7110 SoC system controller provides register information such > >> + as offset, mask and shift to configure related modules such as MMC and PCIe. > >> + > >> +properties: > >> + compatible: > >> + items: > >> + - enum: > >> + - starfive,jh7110-stg-syscon > >> + - starfive,jh7110-sys-syscon > >> + - starfive,jh7110-aon-syscon > > > > Is 'syscon' really part of what the blocks are called? Is just 'stg', > > 'sys' and 'aon' not unique enough? > > > > Rob > Hi Rob, > > In StarFive SoC, we do have syscrg/aoncrg/stgcrg, which is uesd to be the clock > controller, so 'syscon' is added to avoid confusion. You've only added to my confusion. 'syscrg' and 'sys-syscon' are 2 different h/w blocks and unrelated to each other? Or 'syscrg' is the clock portion of 'sys-syscon'? In that case, 'syscrg' should be a child of 'sys-syscon' or possibly just all one node. Please provide details on the entire h/w block so we can provide better input on the bindings. Rob