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From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: <agross@kernel.org>, <andersson@kernel.org>,
	<konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>,
	<sboyd@kernel.org>, <ulf.hansson@linaro.org>,
	<linus.walleij@linaro.org>, <catalin.marinas@arm.com>,
	<will@kernel.org>, <p.zabel@pengutronix.de>,
	<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
	<linux-gpio@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <robimarko@gmail.com>,
	<krzysztof.kozlowski@linaro.org>
Subject: Re: [PATCH V8 2/8] clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018
Date: Fri, 2 Jun 2023 22:40:35 +0530	[thread overview]
Message-ID: <36788c66-a93d-9f80-ae5b-44ec1bd27b31@quicinc.com> (raw)
In-Reply-To: <CAHp75Vcfa2cbACEPROuOptPM7c9SOp_TudK-4Rx45OhWPf=iiw@mail.gmail.com>



On 6/2/2023 6:41 PM, Andy Shevchenko wrote:
> On Fri, Jun 2, 2023 at 11:24 AM Sricharan Ramabadhran
> <quic_srichara@quicinc.com> wrote:
>>
>> Add support for the global clock controller found on IPQ5018
>> based devices.
> 
> ...
> 
>>   config IPQ_GCC_5332
>>          tristate "IPQ5332 Global Clock Controller"
>>          depends on ARM64 || COMPILE_TEST
>>          help
>>            Support for the global clock controller on ipq5332 devices.
>> -         Say Y if you want to use peripheral devices such as UART, SPI,
>> -         i2c, USB, SD/eMMC, etc.
> 
> Nothing in the commit message about this. Please, elaborate.
> 
> ...

  oops, unintended change. Not sure how this crept in.
  Thanks for catching it, will remove this.

> 
>> +#include <linux/kernel.h>
>> +#include <linux/err.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_device.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/regmap.h>
>> +#include <linux/reset-controller.h>
> 
> Why not keep this ordered?
> 
> Missing bits.h and maybe others, but in an unordered list it's harder to check.
> 

  sure, will order it.

> ...
> 
>> +                       &gpll4_main.clkr.hw
> 
> Can we keep trailing comma here and in similar cases, like
> 
>> +                       &ubi32_pll_main.clkr.hw
>> +                       &gpll0_main.clkr.hw
> 
> (and many others)?
> 

  ok, will fix it.

Regards,
  Sricharan

      reply	other threads:[~2023-06-02 17:11 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-02  8:23 [PATCH V8 0/8] Add minimal boot support for IPQ5018 Sricharan Ramabadhran
2023-06-02  8:23 ` [PATCH V8 1/8] dt-bindings: arm64: Add IPQ5018 clock and reset Sricharan Ramabadhran
2023-06-02  8:23 ` [PATCH V8 3/8] dt-bindings: pinctrl: qcom: Add support for ipq5018 Sricharan Ramabadhran
2023-06-02  8:23 ` [PATCH V8 4/8] pinctrl: qcom: Add IPQ5018 pinctrl driver Sricharan Ramabadhran
2023-06-02  8:23 ` [PATCH V8 5/8] dt-bindings: qcom: Add ipq5018 bindings Sricharan Ramabadhran
2023-06-02  8:23 ` [PATCH V8 6/8] dt-bindings: scm: Add compatible for IPQ5018 Sricharan Ramabadhran
2023-06-02  8:23 ` [PATCH V8 7/8] arm64: dts: Add ipq5018 SoC and rdp432-c2 board support Sricharan Ramabadhran
2023-06-02  8:23 ` [PATCH V8 8/8] arm64: defconfig: Enable IPQ5018 SoC base configs Sricharan Ramabadhran
     [not found] ` <20230602082325.1445261-3-quic_srichara@quicinc.com>
2023-06-02 13:11   ` [PATCH V8 2/8] clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018 Andy Shevchenko
2023-06-02 17:10     ` Sricharan Ramabadhran [this message]

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