Linux-mmc Archive on lore.kernel.org
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From: Dmitry Osipenko <digetx@gmail.com>
To: Aniruddha Rao <anrao@nvidia.com>,
	adrian.hunter@intel.com, ulf.hansson@linaro.org,
	thierry.reding@gmail.com, jonathanh@nvidia.com,
	p.zabel@pengutronix.de
Cc: linux-mmc@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mmc: tegra: Add Runtime PM callbacks
Date: Mon, 27 Jul 2020 16:10:07 +0300
Message-ID: <ea1a68b6-2399-f7ae-a336-bd1e14793b52@gmail.com> (raw)
In-Reply-To: <1595854036-15434-1-git-send-email-anrao@nvidia.com>

27.07.2020 15:47, Aniruddha Rao пишет:
> Add runtime suspend/resume callbacks to save power
> when the bus is not in use.
> In runtime suspend
> - Turn off the SDMMC host CAR clock.
> - Turn off the trimmer/DLL circuit(BG) power supply(VREG).
> - Turn off the SDMMC host internal clocks.
> 
> Re-enable all the disabled clocks/regulators in runtime resume.
> 
> Signed-off-by: Aniruddha Rao <anrao@nvidia.com>
> ---
>  drivers/mmc/host/sdhci-tegra.c | 149 ++++++++++++++++++++++++++++++++++++++---
>  1 file changed, 140 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index 0a3f9d0..1b4b245 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -23,6 +23,7 @@
>  #include <linux/mmc/slot-gpio.h>
>  #include <linux/gpio/consumer.h>
>  #include <linux/ktime.h>
> +#include <linux/pm_runtime.h>
>  
>  #include "sdhci-pltfm.h"
>  #include "cqhci.h"
> @@ -36,6 +37,7 @@
>  #define SDHCI_CLOCK_CTRL_SDR50_TUNING_OVERRIDE		BIT(5)
>  #define SDHCI_CLOCK_CTRL_PADPIPE_CLKEN_OVERRIDE		BIT(3)
>  #define SDHCI_CLOCK_CTRL_SPI_MODE_CLKEN_OVERRIDE	BIT(2)
> +#define SDHCI_CLOCK_CTRL_SDMMC_CLK			BIT(0)
>  
>  #define SDHCI_TEGRA_VENDOR_SYS_SW_CTRL			0x104
>  #define SDHCI_TEGRA_SYS_SW_CTRL_ENHANCED_STROBE		BIT(31)
> @@ -51,6 +53,9 @@
>  #define SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300		0x20
>  #define SDHCI_MISC_CTRL_ENABLE_DDR50			0x200
>  
> +#define SDHCI_TEGRA_VENDOR_IO_TRIM_CTRL_0		0x1AC
> +#define SDHCI_TEGRA_IO_TRIM_CTRL_0_SEL_VREG_MASK	0x4

Hello Aniruddha,

Does this register exist on older Tegra SoCs?

  reply index

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-27 12:47 Aniruddha Rao
2020-07-27 13:10 ` Dmitry Osipenko [this message]
2020-07-28 14:12 ` Jon Hunter

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