linux-mtd.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Michael Walle <michael@walle.cc>
To: Tudor.Ambarus@microchip.com
Cc: linux-mtd@lists.infradead.org, vigneshr@ti.com, js07.lee@samsung.com
Subject: Re: [PATCH v4 0/4] Add SR 4bit block protection support
Date: Tue, 24 Mar 2020 09:49:08 +0100	[thread overview]
Message-ID: <03162f74ce11c001f5fb391d8a90f7ff@walle.cc> (raw)
In-Reply-To: <20200324060123.1533917-1-tudor.ambarus@microchip.com>

Am 2020-03-24 07:01, schrieb Tudor.Ambarus@microchip.com:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
> 
> Hi,
> 
> In v4, I dropped patch 1/5 and stripped the changelog that I had
> above my S-o-b tag in each patch.

looks, good, will you merge this into next today?

-michael

> 
> Jungseung Lee (3):
>   mtd: spi-nor: Add new formula for SR block protection handling
>   mtd: spi-nor: Add SR 4bit block protection support
>   mtd: spi-nor: Enable locking for n25q512ax3/n25q512a
> 
> Tudor Ambarus (1):
>   mtd: spi-nor: Set all BP bits to one when lock_len == mtd->size
> 
>  drivers/mtd/spi-nor/core.c      | 144 +++++++++++++++++++++-----------
>  drivers/mtd/spi-nor/core.h      |  10 +++
>  drivers/mtd/spi-nor/micron-st.c |   8 +-
>  include/linux/mtd/spi-nor.h     |   2 +
>  4 files changed, 113 insertions(+), 51 deletions(-)

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2020-03-24  8:49 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-24  6:01 [PATCH v4 0/4] Add SR 4bit block protection support Tudor.Ambarus
2020-03-24  6:01 ` [PATCH v4 1/4] mtd: spi-nor: Set all BP bits to one when lock_len == mtd->size Tudor.Ambarus
2020-03-24  6:01 ` [PATCH v4 2/4] mtd: spi-nor: Add new formula for SR block protection handling Tudor.Ambarus
2020-03-24  6:01 ` [PATCH v4 4/4] mtd: spi-nor: Enable locking for n25q512ax3/n25q512a Tudor.Ambarus
2020-03-24  6:01 ` [PATCH v4 3/4] mtd: spi-nor: Add SR 4bit block protection support Tudor.Ambarus
2020-03-24  8:49 ` Michael Walle [this message]
2020-03-24 13:47 ` [PATCH v4 0/4] " Tudor.Ambarus

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=03162f74ce11c001f5fb391d8a90f7ff@walle.cc \
    --to=michael@walle.cc \
    --cc=Tudor.Ambarus@microchip.com \
    --cc=js07.lee@samsung.com \
    --cc=linux-mtd@lists.infradead.org \
    --cc=vigneshr@ti.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).