diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c index 95ab933a10..7d6492452b 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c @@ -423,6 +423,46 @@ u16 busy_timeout_cycles; u8 wrn_dly_sel; + printk("%s(%d): gpmi_nfc_compute_timings()\n", __FILE__, __LINE__); + printk(" sdr->tBERS_max=%llu\n", sdr->tBERS_max); + printk(" sdr->tCCS_min=%u\n", sdr->tCCS_min); + printk(" sdr->tPROG_max=%llu\n", sdr->tPROG_max); + printk(" sdr->tR_max=%llu\n", sdr->tR_max); + printk(" sdr->tALH_min=%u\n", sdr->tALH_min); + printk(" sdr->tADL_min=%u\n", sdr->tADL_min); + printk(" sdr->tALS_min=%u\n", sdr->tALS_min); + printk(" sdr->tAR_min=%u\n", sdr->tAR_min); + printk(" sdr->tCEA_max=%u\n", sdr->tCEA_max); + printk(" sdr->tCEH_min=%u\n", sdr->tCEH_min); + printk(" sdr->tCH_min=%u\n", sdr->tCH_min); + printk(" sdr->tCHZ_max=%u\n", sdr->tCHZ_max); + printk(" sdr->tCLH_min=%u\n", sdr->tCLH_min); + printk(" sdr->tCLR_min=%u\n", sdr->tCLR_min); + printk(" sdr->tCLS_min=%u\n", sdr->tCLS_min); + printk(" sdr->tCOH_min=%u\n", sdr->tCOH_min); + printk(" sdr->tCS_min=%u\n", sdr->tCS_min); + printk(" sdr->tDH_min=%u\n", sdr->tDH_min); + printk(" sdr->tDS_min=%u\n", sdr->tDS_min); + printk(" sdr->tFEAT_max=%u\n", sdr->tFEAT_max); + printk(" sdr->tIR_min=%u\n", sdr->tIR_min); + printk(" sdr->tITC_max=%u\n", sdr->tITC_max); + printk(" sdr->tRC_min=%u\n", sdr->tRC_min); + printk(" sdr->tREA_max=%u\n", sdr->tREA_max); + printk(" sdr->tREH_min=%u\n", sdr->tREH_min); + printk(" sdr->tRHOH_min=%u\n", sdr->tRHOH_min); + printk(" sdr->tRHW_min=%u\n", sdr->tRHW_min); + printk(" sdr->tRHZ_max=%u\n", sdr->tRHZ_max); + printk(" sdr->tRLOH_min=%u\n", sdr->tRLOH_min); + printk(" sdr->tRP_min=%u\n", sdr->tRP_min); + printk(" sdr->tRR_min=%u\n", sdr->tRR_min); + printk(" sdr->tRST_max=%llu\n", sdr->tRST_max); + printk(" sdr->tWB_max=%u\n", sdr->tWB_max); + printk(" sdr->tWC_min=%u\n", sdr->tWC_min); + printk(" sdr->tWH_min=%u\n", sdr->tWH_min); + printk(" sdr->tWHR_min=%u\n", sdr->tWHR_min); + printk(" sdr->tWP_min=%u\n", sdr->tWP_min); + printk(" sdr->tWW_min=%u\n", sdr->tWW_min); + if (sdr->tRC_min >= 30000) { /* ONFI non-EDO modes [0-3] */ hw->clk_rate = 22000000; @@ -436,19 +476,28 @@ hw->clk_rate = 100000000; wrn_dly_sel = BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } + printk(" hw->clk_rate=%lu\n", hw->clk_rate); + printk(" wrn_dly_sel=%u\n", wrn_dly_sel); /* SDR core timings are given in picoseconds */ period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); + printk(" period_ps=%u\n", period_ps); addr_setup_cycles = TO_CYCLES(sdr->tALS_min, period_ps); + printk(" addr_setup_cycles=%u\n", addr_setup_cycles); data_setup_cycles = TO_CYCLES(sdr->tDS_min, period_ps); + printk(" data_setup_cycles=%u\n", data_setup_cycles); data_hold_cycles = TO_CYCLES(sdr->tDH_min, period_ps); + printk(" data_hold_cycles=%u\n", data_hold_cycles); busy_timeout_cycles = TO_CYCLES(sdr->tWB_max + sdr->tR_max, period_ps); + printk(" busy_timeout_cycles=%u\n", busy_timeout_cycles); hw->timing0 = BF_GPMI_TIMING0_ADDRESS_SETUP(addr_setup_cycles) | BF_GPMI_TIMING0_DATA_HOLD(data_hold_cycles) | BF_GPMI_TIMING0_DATA_SETUP(data_setup_cycles); + printk(" hw->timing0=0x%08x\n", hw->timing0); hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(busy_timeout_cycles * 4096); + printk(" hw->timing1=0x%08x\n", hw->timing1); /* * Derive NFC ideal delay from {3}: @@ -457,6 +506,7 @@ * RDN_DELAY = ----------------------- * RP */ + printk(" dll_threshold_ps=%u\n", dll_threshold_ps); if (period_ps > dll_threshold_ps) { use_half_period = true; reference_period_ps = period_ps / 2; @@ -464,19 +514,26 @@ use_half_period = false; reference_period_ps = period_ps; } + printk(" use_half_period=%u\n", use_half_period); + printk(" reference_period_ps=%u\n", reference_period_ps); tRP_ps = data_setup_cycles * period_ps; + printk(" tRP_ps=%u\n", tRP_ps); sample_delay_ps = (sdr->tREA_max + 4000 - tRP_ps) * 8; + printk(" sample_delay_ps=%u\n", sample_delay_ps); if (sample_delay_ps > 0) sample_delay_factor = sample_delay_ps / reference_period_ps; else sample_delay_factor = 0; + printk(" sample_delay_factor=%u\n", sample_delay_factor); hw->ctrl1n = BF_GPMI_CTRL1_WRN_DLY_SEL(wrn_dly_sel); + printk(" hw->ctrl1n=0x%08x\n", hw->ctrl1n); if (sample_delay_factor) hw->ctrl1n |= BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | BM_GPMI_CTRL1_DLL_ENABLE | (use_half_period ? BM_GPMI_CTRL1_HALF_PERIOD : 0); + printk(" hw->ctrl1n=0x%08x\n", hw->ctrl1n); } void gpmi_nfc_apply_timings(struct gpmi_nand_data *this) @@ -485,8 +542,13 @@ struct resources *r = &this->resources; void __iomem *gpmi_regs = r->gpmi_regs; unsigned int dll_wait_time_us; + int ret; - clk_set_rate(r->clock[0], hw->clk_rate); + printk("%s(%d): gpmi_nfc_apply_timings()\n", __FILE__, __LINE__); + printk(" hw>clk_rate=%lu\n", hw->clk_rate); + ret = clk_set_rate(r->clock[0], hw->clk_rate); + printk(" clk_set_rate(r->clock[0], hw->clk_rate)=%d\n", ret); + printk(" clk_get_rate(r->clock[0])=%lu\n", clk_get_rate(r->clock[0])); writel(hw->timing0, gpmi_regs + HW_GPMI_TIMING0); writel(hw->timing1, gpmi_regs + HW_GPMI_TIMING1); diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index ddd396e93e..73f94842e8 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -910,6 +910,7 @@ static int nand_init_data_interface(struct nand_chip *chip) } for (mode = fls(modes) - 1; mode >= 0; mode--) { + printk("%s(%d): checking mode=%d\n", __FILE__, __LINE__, mode); ret = onfi_fill_data_interface(chip, NAND_SDR_IFACE, mode); if (ret) continue; @@ -923,10 +924,12 @@ static int nand_init_data_interface(struct nand_chip *chip) &chip->data_interface); if (!ret) { chip->onfi_timing_mode_default = mode; + printk("%s(%d): BREAKING AT mode=%d\n", __FILE__, __LINE__, mode); break; } } + printk("%s(%d): chip->onfi_timing_mode_default=%d\n", __FILE__, __LINE__, chip->onfi_timing_mode_default); return 0; }