From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: mark.rutland@arm.com, tudor.ambarus@gmail.com, vigneshr@ti.com,
linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com,
cyrille.pitchen@atmel.com, marex@denx.de,
boris.brezillon@free-electrons.com, tien.fong.chee@intel.com,
richard@nod.at, simon.k.r.goldschmidt@gmail.com,
devicetree@vger.kernel.org, cheol.yong.kim@intel.com,
robh+dt@kernel.org, qi-ming.wu@intel.com,
david.oberhollenzer@sigma-star.at, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, dinguyen@kernel.org,
broonie@kernel.org, computersforpeace@gmail.com,
dwmw2@infradead.org
Subject: Re: [PATCH v11 2/2] spi: cadence-quadspi: Add support for the Cadence QSPI controller
Date: Fri, 28 Feb 2020 15:53:37 +0800 [thread overview]
Message-ID: <10c5ec3f-8f1e-3f6f-a9cc-c8a3f8f2be75@linux.intel.com> (raw)
In-Reply-To: <20200228084651.1ad0e334@collabora.com>
Hi Boris,
On 28/2/2020 3:46 PM, Boris Brezillon wrote:
> On Fri, 28 Feb 2020 12:11:09 +0800
> "Ramuthevar, Vadivel MuruganX"
> <vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
>
>> Hi Boris,
>>
>> Thank you so much for the review comments...
>>
>> On 28/2/2020 1:30 AM, Boris Brezillon wrote:
>>> On Thu, 27 Feb 2020 14:27:08 +0800
>>> "Ramuthevar, Vadivel MuruganX"
>>> <vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
>>>
>>>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>>>>
>>>> Add support for the Cadence QSPI controller. This controller is
>>>> present in the Intel Lightning Mountain(LGM) SoCs, Altera and TI SoCs.
>>>> This driver has been tested on the Intel LGM SoCs.
>>>>
>>>> This driver does not support generic SPI and also the implementation
>>>> only supports spi-mem interface to replace the existing driver in
>>>> mtd/spi-nor/cadence-quadspi.c, the existing driver only support SPI-NOR
>>>> flash memory
>>> Is it really supporting SPI NORs only, or is it just that you only
>>> tested it with a spi-nor?
>> The existing drivers/mtd/spi-nor/cadence-quadspi.c supports SPI-NORs
>> only, because the driver is developed
>>
>> such a way that it does not support other SPI based flash memories, also
>> never uses SPI/SPI-MEM based framework.
>>
>> So we Vignesh suggested me to develop the new driver which supports
>> both SPI-NOR and SPI-NAND based on the SPI-MEM framework.
> Hm, your commit message makes it sound like even the new driver isn't
> generic enough to support SPI NANDs. Maybe there's something to improve
> to clarify the fact that this new version is not limited to SPI NORs.
Thanks! for the suggestions to remind me to add.
sure, I will add more information about supporting SPI-NOR and SPI-NAND
Regards
Vadivel
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prev parent reply other threads:[~2020-02-28 7:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-27 6:27 [PATCH v11 0/2] spi: cadence-quadspi: Add support for the Cadence QSPI controller Ramuthevar, Vadivel MuruganX
2020-02-27 6:27 ` [PATCH v11 1/2] dt-bindings: spi: Add schema for Cadence QSPI Controller driver Ramuthevar, Vadivel MuruganX
2020-02-27 17:07 ` Rob Herring
2020-02-28 3:01 ` Ramuthevar, Vadivel MuruganX
2020-02-27 17:07 ` Rob Herring
2020-02-28 3:08 ` Ramuthevar, Vadivel MuruganX
2020-02-27 6:27 ` [PATCH v11 2/2] spi: cadence-quadspi: Add support for the Cadence QSPI controller Ramuthevar, Vadivel MuruganX
2020-02-27 17:30 ` Boris Brezillon
2020-02-27 17:32 ` Mark Brown
2020-02-28 6:15 ` Ramuthevar, Vadivel MuruganX
2020-02-28 4:11 ` Ramuthevar, Vadivel MuruganX
2020-02-28 7:46 ` Boris Brezillon
2020-02-28 7:53 ` Ramuthevar, Vadivel MuruganX [this message]
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