From: <Tudor.Ambarus@microchip.com> To: <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org> Cc: boris.brezillon@collabora.com, nsekhar@ti.com Subject: Re: [PATCH v15 10/15] mtd: spi-nor: core: enable octal DTR mode when possible Date: Fri, 2 Oct 2020 09:47:45 +0000 Message-ID: <1bd8bbb1-af99-3a55-cfbb-7bffd317e402@microchip.com> (raw) In-Reply-To: <20201001202045.21499-11-p.yadav@ti.com> On 10/1/20 11:20 PM, Pratyush Yadav wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Allow flashes to specify a hook to enable octal DTR mode. Use this hook > whenever possible to get optimal transfer speeds. > > Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > drivers/mtd/spi-nor/core.c | 38 ++++++++++++++++++++++++++++++++++++++ > drivers/mtd/spi-nor/core.h | 2 ++ > 2 files changed, 40 insertions(+) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index e91ddb409699..cf6ada7c8a7b 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -3068,6 +3068,38 @@ static int spi_nor_init_params(struct spi_nor *nor) > return 0; > } > > +/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed > + * @nor: pointer to a 'struct spi_nor' > + * @enable: whether to enable or disable Octal DTR > + * > + * Return: 0 on success, -errno otherwise. > + */ > +static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) > +{ > + int ret; > + > + if (!nor->params->octal_dtr_enable) > + return 0; > + > + if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR && > + nor->write_proto == SNOR_PROTO_8_8_8_DTR)) > + return 0; > + > + if (!(nor->flags & SNOR_F_IO_MODE_EN_VOLATILE)) > + return 0; > + > + ret = nor->params->octal_dtr_enable(nor, enable); > + if (ret) > + return ret; > + > + if (enable) > + nor->reg_proto = SNOR_PROTO_8_8_8_DTR; > + else > + nor->reg_proto = SNOR_PROTO_1_1_1; > + > + return 0; > +} > + > /** > * spi_nor_quad_enable() - enable Quad I/O if needed. > * @nor: pointer to a 'struct spi_nor' > @@ -3107,6 +3139,12 @@ static int spi_nor_init(struct spi_nor *nor) > { > int err; > > + err = spi_nor_octal_dtr_enable(nor, true); > + if (err) { > + dev_dbg(nor->dev, "octal mode not supported\n"); > + return err; > + } > + > err = spi_nor_quad_enable(nor); > if (err) { > dev_dbg(nor->dev, "quad mode not supported\n"); > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index eaece1123c0b..105a4ddeb309 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -204,6 +204,7 @@ struct spi_nor_locking_ops { > * higher index in the array, the higher priority. > * @erase_map: the erase map parsed from the SFDP Sector Map Parameter > * Table. > + * @octal_dtr_enable: enables SPI NOR octal DTR mode. > * @quad_enable: enables SPI NOR quad mode. > * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. > * @convert_addr: converts an absolute address into something the flash > @@ -227,6 +228,7 @@ struct spi_nor_flash_parameter { > > struct spi_nor_erase_map erase_map; > > + int (*octal_dtr_enable)(struct spi_nor *nor, bool enable); > int (*quad_enable)(struct spi_nor *nor); > int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); > u32 (*convert_addr)(struct spi_nor *nor, u32 addr); > -- > 2.28.0 > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply index Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-01 20:20 [PATCH v15 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg, write_reg, erase}() Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 03/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 04/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 05/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 06/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 08/15] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 09/15] mtd: spi-nor: Parse SFDP SCCR Map Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 10/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav 2020-10-02 9:47 ` Tudor.Ambarus [this message] 2020-10-01 20:20 ` [PATCH v15 11/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 12/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 13/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav 2020-10-01 20:20 ` [PATCH v15 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav 2020-10-03 11:40 ` Vignesh Raghavendra 2020-10-01 20:20 ` [PATCH v15 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
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