From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: "Sverdlin, Alexander (Nokia - DE/Ulm)" <alexander.sverdlin@nokia.com>
Cc: Bin Meng <bmeng.cn@gmail.com>,
"Porte,
Romain \(Nokia - FR/Paris-Saclay\)" <romain.porte@nokia.com>,
Boris Brezillon <bbrezillon@kernel.org>,
Richard Weinberger <richard@nod.at>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
"stable@vger.kernel.org" <stable@vger.kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"Fabreges,
Pascal \(Nokia - FR/Paris-Saclay\)" <pascal.fabreges@nokia.com>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH] spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write
Date: Tue, 26 Feb 2019 13:31:11 +0200 [thread overview]
Message-ID: <20190226113111.GO2696@lahna.fi.intel.com> (raw)
In-Reply-To: <20190226112334.401-1-alexander.sverdlin@nokia.com>
On Tue, Feb 26, 2019 at 11:23:49AM +0000, Sverdlin, Alexander (Nokia - DE/Ulm) wrote:
> It was observed that reads crossing 4K address boundary are failing.
>
> This limitation is mentioned in Intel documents:
>
> Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet:
>
> "5.26.3 Flash Access
> Program Register Access:
> * Program Register Accesses are not allowed to cross a 4 KB boundary..."
>
> Enhanced Serial Peripheral Interface (eSPI)
> Interface Base Specification (for Client and Server Platforms):
>
> "5.1.4 Address
> For other memory transactions, the address may start or end at any byte
> boundary. However, the address and payload length combination must not
> cross the naturally aligned address boundary of the corresponding Maximum
> Payload Size. It must not cross a 4 KB address boundary."
>
> Avoid this by splitting an operation crossing the boundary into two
> operations.
>
> Cc: stable@vger.kernel.org
> Reported-by: Romain Porte <romain.porte@nokia.com>
> Tested-by: Pascal Fabreges <pascal.fabreges@nokia.com>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
> ---
> drivers/mtd/spi-nor/intel-spi.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c
> index af0a220..b83ea79 100644
> --- a/drivers/mtd/spi-nor/intel-spi.c
> +++ b/drivers/mtd/spi-nor/intel-spi.c
> @@ -632,6 +632,10 @@ static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len,
> while (len > 0) {
> block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ);
>
> + /* Read cannot cross 4K boundary */
> + if ((from ^ (from + block_size - 1)) & ~(SZ_4K - 1LL))
Don't we have existing macros in kernel.h that can be used here and
below?
> + block_size -= (from + block_size) & (SZ_4K - 1);
> +
> writel(from, ispi->base + FADDR);
>
> val = readl(ispi->base + HSFSTS_CTL);
> @@ -685,6 +689,10 @@ static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len,
> while (len > 0) {
> block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ);
>
> + /* Write cannot cross 4K boundary */
> + if ((to ^ (to + block_size - 1)) & ~(SZ_4K - 1LL))
> + block_size -= (to + block_size) & (SZ_4K - 1);
> +
> writel(to, ispi->base + FADDR);
>
> val = readl(ispi->base + HSFSTS_CTL);
> --
> 2.4.6
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next prev parent reply other threads:[~2019-02-26 11:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-26 11:23 [PATCH] spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write Sverdlin, Alexander (Nokia - DE/Ulm)
2019-02-26 11:31 ` Mika Westerberg [this message]
2019-02-27 9:57 ` [PATCH v2] " Sverdlin, Alexander (Nokia - DE/Ulm)
2019-02-27 10:27 ` Mika Westerberg
2019-02-27 13:29 ` Sverdlin, Alexander (Nokia - DE/Ulm)
2019-03-01 21:22 ` Sasha Levin
2019-02-27 13:23 ` [PATCH] " Sasha Levin
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