From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
Richard Weinberger <richard@nod.at>,
linux-kernel@vger.kernel.org, Marek Vasut <marek.vasut@gmail.com>,
bcm-kernel-feedback-list@broadcom.com,
linux-mtd@lists.infradead.org,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH 2/2] mtd: nand: raw: brcmnand: fallback to detected ecc-strength, ecc-step-size
Date: Mon, 20 May 2019 14:44:36 +0200 [thread overview]
Message-ID: <20190520144436.67e42f00@xps13> (raw)
In-Reply-To: <1558117914-35807-2-git-send-email-kdasu.kdev@gmail.com>
Hi Kamal,
Kamal Dasu <kdasu.kdev@gmail.com> wrote on Fri, 17 May 2019 14:29:55
-0400:
> This change supports nand-ecc-step-size and nand-ecc-strenght fields in
strength
> brcmnand dt node to be optional.
DT ^ extra space
> see: Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>
> If both nand-ecc-strength and nand-ecc-step-size are not specified in
> device tree node for NAND, nand_base driver does detect onfi ext ecc
s/nand_base driver/the raw NAND layer/
s/onfi/ONFI/
s/ecc/ECC/
What is "ext"? Please use plain English here.
> info from ONFI extended parameter page for parts using ONFI >= 2.1. In
s/info/information/
> case of non-onfi NAND there could be a nand_id table entry with the ecc
s/ecc/ECC/
> info. If there is a valid device tree entry for nand-ecc-strength and
> nand-ecc-step-size fields it still shall override the detected values.
>
> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
> ---
> drivers/mtd/nand/raw/brcmnand/brcmnand.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> index ce0b8ff..e967b30 100644
> --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
> @@ -2144,6 +2144,16 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
> return -EINVAL;
> }
>
> + if (!(chip->ecc.size > 0 && chip->ecc.strength > 0) &&
Is the case where only size OR strength is valid handled?
> + (chip->base.eccreq.strength > 0 &&
> + chip->base.eccreq.step_size > 0)) {
> + /* use detected ecc parameters */
Use ECC
> + chip->ecc.size = chip->base.eccreq.step_size;
> + chip->ecc.strength = chip->base.eccreq.strength;
> + pr_info("Using detected nand-ecc-step-size %d, nand-ecc-strength %d\n",
> + chip->ecc.size, chip->ecc.strength);
> + }
> +
> switch (chip->ecc.size) {
> case 512:
> if (chip->ecc.algo == NAND_ECC_HAMMING)
Thanks,
Miquèl
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next prev parent reply other threads:[~2019-05-20 12:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-17 18:29 [PATCH 1/2] dt-bindings: mtd: brcmnand: Make nand-ecc-strength and nand-ecc-step-size optional Kamal Dasu
2019-05-17 18:29 ` [PATCH 2/2] mtd: nand: raw: brcmnand: fallback to detected ecc-strength, ecc-step-size Kamal Dasu
2019-05-20 12:44 ` Miquel Raynal [this message]
2019-05-20 17:31 ` Kamal Dasu
2019-05-20 17:34 ` Miquel Raynal
2019-05-20 17:51 ` Kamal Dasu
2019-05-20 12:45 ` [PATCH 1/2] dt-bindings: mtd: brcmnand: Make nand-ecc-strength and nand-ecc-step-size optional Miquel Raynal
2019-06-13 22:51 ` Rob Herring
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