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From: Helmut Grohne <helmut.grohne@intenta.de>
To: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: "vigneshr@ti.com" <vigneshr@ti.com>,
	"bbrezillon@kernel.org" <bbrezillon@kernel.org>,
	"yamada.masahiro@socionext.com" <yamada.masahiro@socionext.com>,
	"richard@nod.at" <richard@nod.at>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"marek.vasut@gmail.com" <marek.vasut@gmail.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
	"computersforpeace@gmail.com" <computersforpeace@gmail.com>,
	"dwmw2@infradead.org" <dwmw2@infradead.org>
Subject: Re: [LINUX PATCH v17 1/2] mtd: rawnand: nand_micron: Do not over write driver's read_page()/write_page()
Date: Tue, 25 Jun 2019 16:11:25 +0200	[thread overview]
Message-ID: <20190625141125.a4umdey6ejxjxap4@laureti-dev> (raw)
In-Reply-To: <20190625044630.31717-1-naga.sureshkumar.relli@xilinx.com>

On Tue, Jun 25, 2019 at 06:46:29AM +0200, Naga Sureshkumar Relli wrote:
> --- a/drivers/mtd/nand/raw/nand_micron.c
> +++ b/drivers/mtd/nand/raw/nand_micron.c
> @@ -500,8 +500,11 @@ static int micron_nand_init(struct nand_chip *chip)
>  		chip->ecc.size = 512;
>  		chip->ecc.strength = chip->base.eccreq.strength;
>  		chip->ecc.algo = NAND_ECC_BCH;
> -		chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
> -		chip->ecc.write_page = micron_nand_write_page_on_die_ecc;
> +		if (!chip->ecc.read_page)
> +			chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
> +
> +		if (!chip->ecc.write_page)
> +			chip->ecc.write_page = micron_nand_write_page_on_die_ecc;

When used with pl353_nand.c, this change prioritizes the
pl353_nand_read_page_raw/pl353_nand_write_page_raw implementations over
micron_nand_read_page_on_die_ecc/micron_nand_write_page_on_die_ecc. The
pl353 implementations don't check the status register of the flash for
NAND_ECC_STATUS_WRITE_RECOMMENDED nor do they update ecc_stats.failed in
any way. Unless I am mistaken, this implies that bitflips cannot be
detected at all anymore.

However, this is the change that makes a MT29F2G08ABAEAWP practically
work with jffs2 on the Zynq platform.

In this context, I countered a document from Micron[1] indicating that
their on-die chips are incompatible with jffs2 as is, because the on-die
oob layout is incompatible with jffs2. I suppose that using the raw
variants puts jffs2 in full control of the oob area, but is this really
the correct solution?

Helmut

[1] https://www.micron.com/~/media/Documents/Products/Technical%20Note/NAND%20Flash/tn2975_enable_on-die-ECC_NAND_JFFS2.pdf

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  parent reply	other threads:[~2019-06-25 14:12 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-25  4:46 [LINUX PATCH v17 1/2] mtd: rawnand: nand_micron: Do not over write driver's read_page()/write_page() Naga Sureshkumar Relli
2019-06-25  4:46 ` [LINUX PATCH v17 2/2] mtd: rawnand: pl353: Add basic driver for arm pl353 smc nand interface Naga Sureshkumar Relli
2019-06-25 14:11   ` Helmut Grohne
2019-07-03  6:13     ` Naga Sureshkumar Relli
2019-07-03  6:25   ` Boris Brezillon
2019-07-03  8:57     ` Naga Sureshkumar Relli
2019-07-03 11:06       ` Boris Brezillon
2019-07-03 11:29         ` Naga Sureshkumar Relli
2019-07-03 11:40           ` Boris Brezillon
2019-06-25 14:11 ` Helmut Grohne [this message]
2019-06-26  6:48 ` [LINUX PATCH v17 1/2] mtd: rawnand: nand_micron: Do not over write driver's read_page()/write_page() Boris Brezillon
2019-06-26 11:22   ` Naga Sureshkumar Relli
2019-06-26 11:27     ` Boris Brezillon
2019-06-26 11:51       ` Naga Sureshkumar Relli
2019-06-26 12:04         ` Boris Brezillon
2019-06-26 12:12           ` Naga Sureshkumar Relli
2019-06-26 12:20             ` Boris Brezillon
2019-06-26 12:33               ` Naga Sureshkumar Relli
2019-07-08 12:18                 ` Naga Sureshkumar Relli

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