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From: Jungseung Lee <js07.lee@samsung.com>
To: Marek Vasut <marek.vasut@gmail.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Boris Brezillon <bbrezillon@kernel.org>,
	Richard Weinberger <richard@nod.at>,
	u.kleine-koenig@pengutronix.de, linux-mtd@lists.infradead.org,
	js07.lee@gmail.com, js07.lee@samsung.com
Subject: [PATCH v3 2/4] mtd: spi-nor: introduce SR_BP_SHIFT define
Date: Sat, 13 Jul 2019 16:15:39 +0900	[thread overview]
Message-ID: <20190713071541.22090-2-js07.lee@samsung.com> (raw)
In-Reply-To: <20190713071541.22090-1-js07.lee@samsung.com>

The shift variable of SR_BP is conclusive because the first bit of SR_BP
is fixed on known flash.

Introduce SR_BP_SHIFT define, and let them used by stm_* functions
to replace ffs operation to get shift value.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 11 +++++------
 include/linux/mtd/spi-nor.h   |  2 ++
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 9ea03f4d943a..dd12d3c83029 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1089,7 +1089,6 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs,
 {
 	struct mtd_info *mtd = &nor->mtd;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
-	int shift = ffs(mask) - 1;
 	int pow;
 
 	if (!(sr & mask)) {
@@ -1097,7 +1096,7 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs,
 		*ofs = 0;
 		*len = 0;
 	} else {
-		pow = ((sr & mask) ^ mask) >> shift;
+		pow = ((sr & mask) ^ mask) >> SR_BP_SHIFT;
 		*len = mtd->size >> pow;
 		if (nor->flags & SNOR_F_HAS_SR_TB && sr & SR_TB_BIT5)
 			*ofs = 0;
@@ -1178,7 +1177,7 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
 	struct mtd_info *mtd = &nor->mtd;
 	int status_old, status_new;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
-	u8 shift = ffs(mask) - 1, pow, val;
+	u8 pow, val;
 	loff_t lock_len;
 	bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB;
 	bool use_top;
@@ -1222,7 +1221,7 @@ static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
 	 *   pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
 	 */
 	pow = ilog2(mtd->size) - ilog2(lock_len);
-	val = mask - (pow << shift);
+	val = mask - (pow << SR_BP_SHIFT);
 	if (val & ~mask)
 		return -EINVAL;
 	/* Don't "lock" with no region! */
@@ -1258,7 +1257,7 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
 	struct mtd_info *mtd = &nor->mtd;
 	int status_old, status_new;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
-	u8 shift = ffs(mask) - 1, pow, val;
+	u8 pow, val;
 	loff_t lock_len;
 	bool can_be_top = true, can_be_bottom = nor->flags & SNOR_F_HAS_SR_TB;
 	bool use_top;
@@ -1305,7 +1304,7 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
 	if (lock_len == 0) {
 		val = 0; /* fully unlocked */
 	} else {
-		val = mask - (pow << shift);
+		val = mask - (pow << SR_BP_SHIFT);
 		/* Some power-of-two sizes are not supported */
 		if (val & ~mask)
 			return -EINVAL;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index f8bbc98432ff..b8f4439c30b1 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -132,6 +132,8 @@
 /* Used for Winbond and GigaDevice flashes */
 #define SR_TB_BIT6		BIT(6)	/* Top/Bottom protect */
 
+#define SR_BP_SHIFT		2
+
 /* Spansion/Cypress specific status bits */
 #define SR_E_ERR		BIT(5)
 #define SR_P_ERR		BIT(6)
-- 
2.17.1


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  parent reply	other threads:[~2019-08-01  2:05 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20190801020509epcas1p155f87090273be705f1a9ae752c0bca5c@epcas1p1.samsung.com>
2019-07-13  7:15 ` [PATCH v3 1/4] mtd: spi-nor: rename SR_TB to indicate the using bit Jungseung Lee
     [not found]   ` <CGME20190801020516epcas1p383452adf9755f7121812aac0f335a779@epcas1p3.samsung.com>
2019-07-13  7:15     ` Jungseung Lee [this message]
     [not found]   ` <CGME20190801020520epcas1p3a9d8fc8175a5cc74be9077c2c6ee678c@epcas1p3.samsung.com>
2019-07-13  7:15     ` [PATCH v3 3/4] mtd: spi-nor: add 4bit block protection support Jungseung Lee
     [not found]   ` <CGME20190801020523epcas1p27580bead294a67fccea6fe8615e73da9@epcas1p2.samsung.com>
2019-07-13  7:15     ` [PATCH v3 4/4] mtd: spi-nor: support lock/unlock for a few Micron chips Jungseung Lee

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