* [PATCH v2 0/2] ] Merge m25p80 into spi-nor
@ 2019-07-20 8:00 Vignesh Raghavendra
2019-07-20 8:00 ` [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c Vignesh Raghavendra
2019-07-20 8:00 ` [PATCH v2 2/2] mtd: spi-nor: Rework hwcaps selection for the spi-mem case Vignesh Raghavendra
0 siblings, 2 replies; 12+ messages in thread
From: Vignesh Raghavendra @ 2019-07-20 8:00 UTC (permalink / raw)
To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus
Cc: Marek Vasut, Yogesh Narayan Gaur, linux-mtd, linux-kernel,
Boris Brezillon
This is repost of patch 6 and 7 split from from Boris Brezillon's X-X-X
mode support series[1]
Background from cover letter for RFC[1]:
m25p80 is just a simple SPI NOR controller driver (a wrapper around the
SPI mem API). Not only it shouldn't be named after a specific SPI NOR
chip, but it also doesn't deserve a specific driver IMO, especially if
the end goal is to get rid of SPI NOR controller drivers found in
drivers/mtd/spi-nor/ and replace them by SPI mem drivers (which would
be placed in drivers/spi/). With this solution, we declare the SPI NOR
driver as a spi_mem_driver, just like the SPI NAND layer is declared as
a spi_mem driver (patch 1/2).
This solution also allows us to check at a fined-grain level (thanks to
the spi_mem_supports_op() function) which operations are supported and
which ones are not, while the original m25p80 logic was basing this
decision on the SPI_{RX,TX}_{DUAL,QUAD,OCTO} flags only (patch 2/2).
[1] https://patchwork.ozlabs.org/cover/982926/
Tested on TI' DRA7xx EVM with TI QSPI controller (a spi-mem driver) with
DMA (s25fl256) flash. I don't see any performance regression due to
bounce buffer copy introduced by this series
Boris Brezillon (2):
mtd: spi-nor: Move m25p80 code in spi-nor.c
mtd: spi-nor: Rework hwcaps selection for the spi-mem case
drivers/mtd/devices/Kconfig | 18 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/m25p80.c | 347 --------------
drivers/mtd/spi-nor/Kconfig | 2 +
drivers/mtd/spi-nor/spi-nor.c | 845 ++++++++++++++++++++++++++++++++--
include/linux/mtd/spi-nor.h | 22 +
6 files changed, 830 insertions(+), 405 deletions(-)
delete mode 100644 drivers/mtd/devices/m25p80.c
--
2.22.0
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-20 8:00 [PATCH v2 0/2] ] Merge m25p80 into spi-nor Vignesh Raghavendra
@ 2019-07-20 8:00 ` Vignesh Raghavendra
2019-07-25 11:19 ` Tudor.Ambarus
2019-07-20 8:00 ` [PATCH v2 2/2] mtd: spi-nor: Rework hwcaps selection for the spi-mem case Vignesh Raghavendra
1 sibling, 1 reply; 12+ messages in thread
From: Vignesh Raghavendra @ 2019-07-20 8:00 UTC (permalink / raw)
To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus
Cc: Marek Vasut, Yogesh Narayan Gaur, linux-mtd, linux-kernel,
Boris Brezillon
From: Boris Brezillon <boris.brezillon@bootlin.com>
The m25p80 driver is actually a generic wrapper around the spi-mem
layer. Not only the driver name is misleading, but we'd expect such a
common logic to be directly available in the core. Another reason for
moving this code is that SPI NOR controller drivers should
progressively be replaced by SPI controller drivers implementing the
spi_mem_ops interface, and when the conversion is done, we should have
a single spi-nor driver directly interfacing with the spi-mem layer.
While moving the code we also fix a longstanding issue when
non-DMA-able buffers are passed by the MTD layer.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
v2:
Add docs for new functions added
Add spi_nor_ prefix to new functions
Incorporate Andrey's patches https://lkml.org/lkml/2019/4/1/32
to avoid looping spi_nor_spimem_* APIs
drivers/mtd/devices/Kconfig | 18 -
drivers/mtd/devices/Makefile | 1 -
drivers/mtd/devices/m25p80.c | 347 -----------------
drivers/mtd/spi-nor/Kconfig | 2 +
drivers/mtd/spi-nor/spi-nor.c | 714 ++++++++++++++++++++++++++++++++--
include/linux/mtd/spi-nor.h | 8 +
6 files changed, 695 insertions(+), 395 deletions(-)
delete mode 100644 drivers/mtd/devices/m25p80.c
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 49abbc52457d..f96287c4b789 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -79,24 +79,6 @@ config MTD_DATAFLASH_OTP
other key product data. The second half is programmed with a
unique-to-each-chip bit pattern at the factory.
-config MTD_M25P80
- tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)"
- depends on SPI_MASTER && MTD_SPI_NOR
- select SPI_MEM
- help
- This enables access to most modern SPI flash chips, used for
- program and data storage. Series supported include Atmel AT26DF,
- Spansion S25SL, SST 25VF, ST M25P, and Winbond W25X. Other chips
- are supported as well. See the driver source for the current list,
- or to add other chips.
-
- Note that the original DataFlash chips (AT45 series, not AT26DF),
- need an entirely different driver.
-
- Set up your spi devices with the right board-specific platform data,
- if you want to specify device partitioning or to use a device which
- doesn't support the JEDEC ID instruction.
-
config MTD_MCHP23K256
tristate "Microchip 23K256 SRAM"
depends on SPI_MASTER
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index 94895eab3066..991c8d12c016 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_MTD_MTDRAM) += mtdram.o
obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
-obj-$(CONFIG_MTD_M25P80) += m25p80.o
obj-$(CONFIG_MTD_MCHP23K256) += mchp23k256.o
obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o
obj-$(CONFIG_MTD_SST25L) += sst25l.o
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
deleted file mode 100644
index c50888670250..000000000000
--- a/drivers/mtd/devices/m25p80.c
+++ /dev/null
@@ -1,347 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
- *
- * Author: Mike Lavender, mike@steroidmicros.com
- *
- * Copyright (c) 2005, Intec Automation Inc.
- *
- * Some parts are based on lart.c by Abraham Van Der Merwe
- *
- * Cleaned up and generalized based on mtd_dataflash.c
- */
-
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/device.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-
-#include <linux/spi/spi.h>
-#include <linux/spi/spi-mem.h>
-#include <linux/spi/flash.h>
-#include <linux/mtd/spi-nor.h>
-
-struct m25p {
- struct spi_mem *spimem;
- struct spi_nor spi_nor;
-};
-
-static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
-{
- struct m25p *flash = nor->priv;
- struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
- SPI_MEM_OP_NO_ADDR,
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_IN(len, NULL, 1));
- void *scratchbuf;
- int ret;
-
- scratchbuf = kmalloc(len, GFP_KERNEL);
- if (!scratchbuf)
- return -ENOMEM;
-
- op.data.buf.in = scratchbuf;
- ret = spi_mem_exec_op(flash->spimem, &op);
- if (ret < 0)
- dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
- code);
- else
- memcpy(val, scratchbuf, len);
-
- kfree(scratchbuf);
-
- return ret;
-}
-
-static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
-{
- struct m25p *flash = nor->priv;
- struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
- SPI_MEM_OP_NO_ADDR,
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_OUT(len, NULL, 1));
- void *scratchbuf;
- int ret;
-
- scratchbuf = kmemdup(buf, len, GFP_KERNEL);
- if (!scratchbuf)
- return -ENOMEM;
-
- op.data.buf.out = scratchbuf;
- ret = spi_mem_exec_op(flash->spimem, &op);
- kfree(scratchbuf);
-
- return ret;
-}
-
-static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
- const u_char *buf)
-{
- struct m25p *flash = nor->priv;
- struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
- SPI_MEM_OP_ADDR(nor->addr_width, to, 1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_OUT(len, buf, 1));
- int ret;
-
- /* get transfer protocols. */
- op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->write_proto);
- op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->write_proto);
- op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->write_proto);
-
- if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
- op.addr.nbytes = 0;
-
- ret = spi_mem_adjust_op_size(flash->spimem, &op);
- if (ret)
- return ret;
- op.data.nbytes = len < op.data.nbytes ? len : op.data.nbytes;
-
- ret = spi_mem_exec_op(flash->spimem, &op);
- if (ret)
- return ret;
-
- return op.data.nbytes;
-}
-
-/*
- * Read an address range from the nor chip. The address range
- * may be any size provided it is within the physical boundaries.
- */
-static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
- u_char *buf)
-{
- struct m25p *flash = nor->priv;
- struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
- SPI_MEM_OP_ADDR(nor->addr_width, from, 1),
- SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
- SPI_MEM_OP_DATA_IN(len, buf, 1));
- size_t remaining = len;
- int ret;
-
- /* get transfer protocols. */
- op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(nor->read_proto);
- op.addr.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
- op.dummy.buswidth = op.addr.buswidth;
- op.data.buswidth = spi_nor_get_protocol_data_nbits(nor->read_proto);
-
- /* convert the dummy cycles to the number of bytes */
- op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
-
- while (remaining) {
- op.data.nbytes = remaining < UINT_MAX ? remaining : UINT_MAX;
- ret = spi_mem_adjust_op_size(flash->spimem, &op);
- if (ret)
- return ret;
-
- ret = spi_mem_exec_op(flash->spimem, &op);
- if (ret)
- return ret;
-
- op.addr.val += op.data.nbytes;
- remaining -= op.data.nbytes;
- op.data.buf.in += op.data.nbytes;
- }
-
- return len;
-}
-
-/*
- * board specific setup should have ensured the SPI clock used here
- * matches what the READ command supports, at least until this driver
- * understands FAST_READ (for clocks over 25 MHz).
- */
-static int m25p_probe(struct spi_mem *spimem)
-{
- struct spi_device *spi = spimem->spi;
- struct flash_platform_data *data;
- struct m25p *flash;
- struct spi_nor *nor;
- struct spi_nor_hwcaps hwcaps = {
- .mask = SNOR_HWCAPS_READ |
- SNOR_HWCAPS_READ_FAST |
- SNOR_HWCAPS_PP,
- };
- char *flash_name;
- int ret;
-
- data = dev_get_platdata(&spimem->spi->dev);
-
- flash = devm_kzalloc(&spimem->spi->dev, sizeof(*flash), GFP_KERNEL);
- if (!flash)
- return -ENOMEM;
-
- nor = &flash->spi_nor;
-
- /* install the hooks */
- nor->read = m25p80_read;
- nor->write = m25p80_write;
- nor->write_reg = m25p80_write_reg;
- nor->read_reg = m25p80_read_reg;
-
- nor->dev = &spimem->spi->dev;
- spi_nor_set_flash_node(nor, spi->dev.of_node);
- nor->priv = flash;
-
- spi_mem_set_drvdata(spimem, flash);
- flash->spimem = spimem;
-
- if (spi->mode & SPI_RX_OCTAL) {
- hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
-
- if (spi->mode & SPI_TX_OCTAL)
- hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 |
- SNOR_HWCAPS_PP_1_1_8 |
- SNOR_HWCAPS_PP_1_8_8);
- } else if (spi->mode & SPI_RX_QUAD) {
- hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
-
- if (spi->mode & SPI_TX_QUAD)
- hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
- SNOR_HWCAPS_PP_1_1_4 |
- SNOR_HWCAPS_PP_1_4_4);
- } else if (spi->mode & SPI_RX_DUAL) {
- hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
-
- if (spi->mode & SPI_TX_DUAL)
- hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
- }
-
- if (data && data->name)
- nor->mtd.name = data->name;
-
- if (!nor->mtd.name)
- nor->mtd.name = spi_mem_get_name(spimem);
-
- /* For some (historical?) reason many platforms provide two different
- * names in flash_platform_data: "name" and "type". Quite often name is
- * set to "m25p80" and then "type" provides a real chip name.
- * If that's the case, respect "type" and ignore a "name".
- */
- if (data && data->type)
- flash_name = data->type;
- else if (!strcmp(spi->modalias, "spi-nor"))
- flash_name = NULL; /* auto-detect */
- else
- flash_name = spi->modalias;
-
- ret = spi_nor_scan(nor, flash_name, &hwcaps);
- if (ret)
- return ret;
-
- return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
- data ? data->nr_parts : 0);
-}
-
-
-static int m25p_remove(struct spi_mem *spimem)
-{
- struct m25p *flash = spi_mem_get_drvdata(spimem);
-
- spi_nor_restore(&flash->spi_nor);
-
- /* Clean up MTD stuff. */
- return mtd_device_unregister(&flash->spi_nor.mtd);
-}
-
-static void m25p_shutdown(struct spi_mem *spimem)
-{
- struct m25p *flash = spi_mem_get_drvdata(spimem);
-
- spi_nor_restore(&flash->spi_nor);
-}
-/*
- * Do NOT add to this array without reading the following:
- *
- * Historically, many flash devices are bound to this driver by their name. But
- * since most of these flash are compatible to some extent, and their
- * differences can often be differentiated by the JEDEC read-ID command, we
- * encourage new users to add support to the spi-nor library, and simply bind
- * against a generic string here (e.g., "jedec,spi-nor").
- *
- * Many flash names are kept here in this list (as well as in spi-nor.c) to
- * keep them available as module aliases for existing platforms.
- */
-static const struct spi_device_id m25p_ids[] = {
- /*
- * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
- * hack around the fact that the SPI core does not provide uevent
- * matching for .of_match_table
- */
- {"spi-nor"},
-
- /*
- * Entries not used in DTs that should be safe to drop after replacing
- * them with "spi-nor" in platform data.
- */
- {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
-
- /*
- * Entries that were used in DTs without "jedec,spi-nor" fallback and
- * should be kept for backward compatibility.
- */
- {"at25df321a"}, {"at25df641"}, {"at26df081a"},
- {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
- {"mx25l25635e"},{"mx66l51235l"},
- {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
- {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
- {"s25fl064k"},
- {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
- {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
- {"m25p64"}, {"m25p128"},
- {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
- {"w25q80bl"}, {"w25q128"}, {"w25q256"},
-
- /* Flashes that can't be detected using JEDEC */
- {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
- {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
- {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
-
- /* Everspin MRAMs (non-JEDEC) */
- { "mr25h128" }, /* 128 Kib, 40 MHz */
- { "mr25h256" }, /* 256 Kib, 40 MHz */
- { "mr25h10" }, /* 1 Mib, 40 MHz */
- { "mr25h40" }, /* 4 Mib, 40 MHz */
-
- { },
-};
-MODULE_DEVICE_TABLE(spi, m25p_ids);
-
-static const struct of_device_id m25p_of_table[] = {
- /*
- * Generic compatibility for SPI NOR that can be identified by the
- * JEDEC READ ID opcode (0x9F). Use this, if possible.
- */
- { .compatible = "jedec,spi-nor" },
- {}
-};
-MODULE_DEVICE_TABLE(of, m25p_of_table);
-
-static struct spi_mem_driver m25p80_driver = {
- .spidrv = {
- .driver = {
- .name = "m25p80",
- .of_match_table = m25p_of_table,
- },
- .id_table = m25p_ids,
- },
- .probe = m25p_probe,
- .remove = m25p_remove,
- .shutdown = m25p_shutdown,
-
- /* REVISIT: many of these chips have deep power-down modes, which
- * should clearly be entered on suspend() to minimize power use.
- * And also when they're otherwise idle...
- */
-};
-
-module_spi_mem_driver(m25p80_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Mike Lavender");
-MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
index 6de83277ce8b..f237fcdf7f86 100644
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
@@ -2,6 +2,8 @@
menuconfig MTD_SPI_NOR
tristate "SPI-NOR device support"
depends on MTD
+ depends on MTD && SPI_MASTER
+ select SPI_MEM
help
This is the framework for the SPI NOR which can be used by the SPI
device drivers and the SPI-NOR device driver.
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 03cc788511d5..f428a6d4022b 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -19,6 +19,7 @@
#include <linux/mtd/mtd.h>
#include <linux/of_platform.h>
+#include <linux/sched/task_stack.h>
#include <linux/spi/flash.h>
#include <linux/mtd/spi-nor.h>
@@ -288,6 +289,232 @@ struct flash_info {
#define JEDEC_MFR(info) ((info)->id[0])
+/**
+ * spi_nor_exec_op() - helper function to read/write flash registers
+ * @nor: pointer to 'struct spi_nor'
+ * @op: pointer to 'struct spi_mem_op' template for transfer
+ * @addr: pointer to offset within flash
+ * @buf: pointer to data buffer into which data is read/written
+ * into
+ * @len: length of the transfer
+ *
+ * Return: 0 on success, non-zero otherwise
+ */
+static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
+ u64 *addr, void *buf, size_t len)
+{
+ int ret;
+ bool usebouncebuf = false;
+
+ if (!op || (len && !buf))
+ return -EINVAL;
+
+ if (op->addr.nbytes && addr)
+ op->addr.val = *addr;
+
+ op->data.nbytes = len;
+
+ if (object_is_on_stack(buf) || !virt_addr_valid(buf))
+ usebouncebuf = true;
+ if (len && usebouncebuf) {
+ if (len > nor->bouncebuf_size)
+ return -ENOTSUPP;
+
+ if (op->data.dir == SPI_MEM_DATA_IN) {
+ op->data.buf.in = nor->bouncebuf;
+ } else {
+ op->data.buf.out = nor->bouncebuf;
+ memcpy(nor->bouncebuf, buf, len);
+ }
+ } else {
+ op->data.buf.out = buf;
+ }
+
+ ret = spi_mem_exec_op(nor->spimem, op);
+ if (ret)
+ return ret;
+
+ if (usebouncebuf && len && op->data.dir == SPI_MEM_DATA_IN)
+ memcpy(buf, nor->bouncebuf, len);
+
+ return 0;
+}
+
+/**
+ * spi_nor_data_op() - read/write to flash's registers
+ * @nor: pointer to 'struct spi_nor'
+ * @op: pointer to 'struct spi_mem_op' template for transfer
+ * @buf: pointer to data buffer into which data is read/written
+ * into
+ * @len: length of the transfer
+ *
+ * Return: 0 on success, non-zero otherwise
+ */
+static int spi_nor_data_op(struct spi_nor *nor, struct spi_mem_op *op,
+ void *buf, size_t len)
+{
+ return spi_nor_exec_op(nor, op, NULL, buf, len);
+}
+
+/**
+ * spi_nor_nodata_op() - send cmd to flash with no data (e.g. WREN)
+ * @nor: pointer to 'struct spi_nor'
+ * @op: pointer to 'struct spi_mem_op' template for transfer
+ *
+ * Return: 0 on success, non-zero otherwise
+ */
+static int spi_nor_nodata_op(struct spi_nor *nor, struct spi_mem_op *op)
+{
+ return spi_nor_exec_op(nor, op, NULL, NULL, 0);
+}
+
+/**
+ * spi_nor_spimem_xfer_data() - helper function to read/write data to
+ * flash's memory region
+ * @nor: pointer to 'struct spi_nor'
+ * @op: pointer to 'struct spi_mem_op' template for transfer
+ * @proto: protocol to be used for transfer
+ *
+ * Return: number of bytes transferred on success, -errno otherwise
+ */
+static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
+ struct spi_mem_op *op,
+ enum spi_nor_protocol proto)
+{
+ bool usebouncebuf = false;
+ void *rdbuf = NULL;
+ const void *buf;
+ int ret;
+
+ /* get transfer protocols. */
+ op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(proto);
+ op->addr.buswidth = spi_nor_get_protocol_addr_nbits(proto);
+ op->data.buswidth = spi_nor_get_protocol_data_nbits(proto);
+
+ if (op->data.dir == SPI_MEM_DATA_IN)
+ buf = op->data.buf.in;
+ else
+ buf = op->data.buf.out;
+
+ if (object_is_on_stack(buf) || !virt_addr_valid(buf))
+ usebouncebuf = true;
+
+ if (usebouncebuf) {
+ if (op->data.nbytes > nor->bouncebuf_size)
+ op->data.nbytes = nor->bouncebuf_size;
+
+ if (op->data.dir == SPI_MEM_DATA_IN) {
+ rdbuf = op->data.buf.in;
+ op->data.buf.in = nor->bouncebuf;
+ } else {
+ op->data.buf.out = nor->bouncebuf;
+ memcpy(nor->bouncebuf, buf,
+ op->data.nbytes);
+ }
+ }
+
+ ret = spi_mem_adjust_op_size(nor->spimem, op);
+ if (ret)
+ return ret;
+
+ ret = spi_mem_exec_op(nor->spimem, op);
+ if (ret)
+ return ret;
+
+ if (usebouncebuf && op->data.dir == SPI_MEM_DATA_IN)
+ memcpy(rdbuf, nor->bouncebuf, op->data.nbytes);
+
+ return op->data.nbytes;
+}
+
+/**
+ * spi_nor_spimem_read_data() - read data from flash's memory region via
+ * spi-mem
+ * @nor: pointer to 'struct spi_nor'
+ * @ofs: offset to read from
+ * @len: number of bytes to read
+ * @buf: pointer to dst buffer
+ *
+ * Return: number of bytes read successfully, -errno otherwise
+ */
+static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t ofs,
+ size_t len, u8 *buf)
+{
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
+ SPI_MEM_OP_ADDR(nor->addr_width, ofs, 1),
+ SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
+ SPI_MEM_OP_DATA_IN(len, buf, 1));
+
+ op.dummy.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
+
+ /* convert the dummy cycles to the number of bytes */
+ op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
+
+ return spi_nor_spimem_xfer_data(nor, &op, nor->read_proto);
+}
+
+/**
+ * spi_nor_read_data() - read data from flash memory
+ * @nor: pointer to 'struct spi_nor'
+ * @ofs: offset to read from
+ * @len: number of bytes to read
+ * @buf: pointer to dst buffer
+ *
+ * Return: number of bytes read successfully, -errno otherwise
+ */
+static ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t ofs, size_t len,
+ u8 *buf)
+{
+ if (nor->spimem)
+ return spi_nor_spimem_read_data(nor, ofs, len, buf);
+
+ return nor->read(nor, ofs, len, buf);
+}
+
+/**
+ * spi_nor_spimem_write_data() - write data to flash memory via
+ * spi-mem
+ * @nor: pointer to 'struct spi_nor'
+ * @ofs: offset to write to
+ * @len: number of bytes to write
+ * @buf: pointer to src buffer
+ *
+ * Return: number of bytes written successfully, -errno otherwise
+ */
+static ssize_t spi_nor_spimem_write_data(struct spi_nor *nor, loff_t ofs,
+ size_t len, const u8 *buf)
+{
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(nor->program_opcode, 1),
+ SPI_MEM_OP_ADDR(nor->addr_width, ofs, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(len, buf, 1));
+
+ if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
+ op.addr.nbytes = 0;
+
+ return spi_nor_spimem_xfer_data(nor, &op, nor->write_proto);
+}
+
+/**
+ * spi_nor_write_data() - write data to flash memory
+ * @nor: pointer to 'struct spi_nor'
+ * @ofs: offset to write to
+ * @len: number of bytes to write
+ * @buf: pointer to src buffer
+ *
+ * Return: number of bytes written successfully, -errno otherwise
+ */
+static ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t ofs, size_t len,
+ const u8 *buf)
+{
+ if (nor->spimem)
+ return spi_nor_spimem_write_data(nor, ofs, len, buf);
+
+ return nor->write(nor, ofs, len, buf);
+}
+
/*
* Read the status register, returning its value in the location
* Return the status register value.
@@ -298,7 +525,18 @@ static int read_sr(struct spi_nor *nor)
int ret;
u8 val;
- ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1);
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_IN(0, NULL, 1));
+
+ ret = spi_nor_data_op(nor, &op, &val, 1);
+ } else {
+ ret = nor->read_reg(nor, SPINOR_OP_RDSR, &val, 1);
+ }
+
if (ret < 0) {
pr_err("error %d reading SR\n", (int) ret);
return ret;
@@ -317,7 +555,18 @@ static int read_fsr(struct spi_nor *nor)
int ret;
u8 val;
- ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1);
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_IN(0, NULL, 1));
+
+ ret = spi_nor_data_op(nor, &op, &val, 1);
+ } else {
+ ret = nor->read_reg(nor, SPINOR_OP_RDFSR, &val, 1);
+ }
+
if (ret < 0) {
pr_err("error %d reading FSR\n", ret);
return ret;
@@ -336,7 +585,18 @@ static int read_cr(struct spi_nor *nor)
int ret;
u8 val;
- ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1);
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_IN(0, NULL, 1));
+
+ ret = spi_nor_data_op(nor, &op, &val, 1);
+ } else {
+ ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1);
+ }
+
if (ret < 0) {
dev_err(nor->dev, "error %d reading CR\n", ret);
return ret;
@@ -351,6 +611,16 @@ static int read_cr(struct spi_nor *nor)
*/
static int write_sr(struct spi_nor *nor, u8 val)
{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_IN(1, NULL, 1));
+
+ return spi_nor_data_op(nor, &op, &val, 1);
+ }
+
nor->cmd_buf[0] = val;
return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1);
}
@@ -361,6 +631,16 @@ static int write_sr(struct spi_nor *nor, u8 val)
*/
static int write_enable(struct spi_nor *nor)
{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ return spi_nor_nodata_op(nor, &op);
+ }
+
return nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0);
}
@@ -369,6 +649,16 @@ static int write_enable(struct spi_nor *nor)
*/
static int write_disable(struct spi_nor *nor)
{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ return spi_nor_nodata_op(nor, &op);
+ }
+
return nor->write_reg(nor, SPINOR_OP_WRDI, NULL, 0);
}
@@ -459,7 +749,6 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor)
struct spi_nor_erase_map *map = &nor->erase_map;
struct spi_nor_erase_type *erase;
int i;
-
for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
erase = &map->erase_type[i];
erase->opcode =
@@ -468,12 +757,62 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor)
}
}
+static int macronix_set_4byte(struct spi_nor *nor, bool enable)
+{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(enable ?
+ SPINOR_OP_EN4B :
+ SPINOR_OP_EX4B,
+ 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ return spi_nor_nodata_op(nor, &op);
+ }
+
+ return nor->write_reg(nor, enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B,
+ NULL, 0);
+}
+
+static int spansion_set_4byte(struct spi_nor *nor, bool enable)
+{
+ u8 quad_en = enable << 7;
+
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(1, NULL, 1));
+
+ return spi_nor_data_op(nor, &op, &quad_en, 1);
+ }
+
+ return nor->write_reg(nor, SPINOR_OP_BRWR, &quad_en, 1);
+}
+
+static int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
+{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREAR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(0, NULL, 1));
+
+ return spi_nor_data_op(nor, &op, &ear, 1);
+ }
+
+ return nor->write_reg(nor, SPINOR_OP_WREAR, &ear, 1);
+}
+
/* Enable/disable 4-byte addressing mode. */
static int set_4byte(struct spi_nor *nor, bool enable)
{
int status;
bool need_wren = false;
- u8 cmd;
switch (JEDEC_MFR(nor->info)) {
case SNOR_MFR_ST:
@@ -486,8 +825,7 @@ static int set_4byte(struct spi_nor *nor, bool enable)
if (need_wren)
write_enable(nor);
- cmd = enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B;
- status = nor->write_reg(nor, cmd, NULL, 0);
+ status = macronix_set_4byte(nor, enable);
if (need_wren)
write_disable(nor);
@@ -500,25 +838,38 @@ static int set_4byte(struct spi_nor *nor, bool enable)
* We must clear the register to enable normal behavior.
*/
write_enable(nor);
- nor->cmd_buf[0] = 0;
- nor->write_reg(nor, SPINOR_OP_WREAR, nor->cmd_buf, 1);
+ spi_nor_write_ear(nor, 0);
write_disable(nor);
}
return status;
default:
/* Spansion style */
- nor->cmd_buf[0] = enable << 7;
- return nor->write_reg(nor, SPINOR_OP_BRWR, nor->cmd_buf, 1);
+ return spansion_set_4byte(nor, enable);
}
}
+static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
+{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_IN(0, NULL, 1));
+
+ return spi_nor_data_op(nor, &op, sr, 1);
+ }
+
+ return nor->read_reg(nor, SPINOR_OP_XRDSR, sr, 1);
+}
+
static int s3an_sr_ready(struct spi_nor *nor)
{
int ret;
u8 val;
- ret = nor->read_reg(nor, SPINOR_OP_XRDSR, &val, 1);
+ ret = spi_nor_xread_sr(nor, &val);
if (ret < 0) {
dev_err(nor->dev, "error %d reading XRDSR\n", (int) ret);
return ret;
@@ -527,6 +878,21 @@ static int s3an_sr_ready(struct spi_nor *nor)
return !!(val & XSR_RDY);
}
+static int spi_nor_clear_sr(struct spi_nor *nor)
+{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ return spi_nor_nodata_op(nor, &op);
+ }
+
+ return nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
+}
+
static int spi_nor_sr_ready(struct spi_nor *nor)
{
int sr = read_sr(nor);
@@ -539,13 +905,28 @@ static int spi_nor_sr_ready(struct spi_nor *nor)
else
dev_err(nor->dev, "Programming Error occurred\n");
- nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
+ spi_nor_clear_sr(nor);
return -EIO;
}
return !(sr & SR_WIP);
}
+static int spi_nor_clear_fsr(struct spi_nor *nor)
+{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ return spi_nor_nodata_op(nor, &op);
+ }
+
+ return nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);
+}
+
static int spi_nor_fsr_ready(struct spi_nor *nor)
{
int fsr = read_fsr(nor);
@@ -562,7 +943,7 @@ static int spi_nor_fsr_ready(struct spi_nor *nor)
dev_err(nor->dev,
"Attempted to modify a protected sector.\n");
- nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);
+ spi_nor_clear_fsr(nor);
return -EIO;
}
@@ -630,6 +1011,16 @@ static int erase_chip(struct spi_nor *nor)
{
dev_dbg(nor->dev, " %lldKiB\n", (long long)(nor->mtd.size >> 10));
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CHIP_ERASE, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ return spi_nor_nodata_op(nor, &op);
+ }
+
return nor->write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0);
}
@@ -692,6 +1083,16 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
if (nor->erase)
return nor->erase(nor, addr);
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(nor->erase_opcode, 1),
+ SPI_MEM_OP_ADDR(nor->addr_width, addr, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_NO_DATA);
+
+ return spi_nor_nodata_op(nor, &op);
+ }
+
/*
* Default implementation, if driver doesn't have a specialized HW
* control
@@ -1406,7 +1807,18 @@ static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr)
write_enable(nor);
- ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(0, NULL, 1));
+
+ ret = spi_nor_data_op(nor, &op, sr_cr, 2);
+ } else {
+ ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
+ }
+
if (ret < 0) {
dev_err(nor->dev,
"error while writing configuration register\n");
@@ -1585,6 +1997,36 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
return 0;
}
+static int spi_nor_write_sr2(struct spi_nor *nor, u8 sr2)
+{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(0, NULL, 1));
+
+ return spi_nor_data_op(nor, &op, &sr2, 1);
+ }
+
+ return nor->write_reg(nor, SPINOR_OP_WRSR2, &sr2, 1);
+}
+
+static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
+{
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_IN(0, NULL, 1));
+
+ return spi_nor_data_op(nor, &op, sr2, 1);
+ }
+
+ return nor->read_reg(nor, SPINOR_OP_RDSR2, sr2, 1);
+}
+
/**
* sr2_bit7_quad_enable() - set QE bit in Status Register 2.
* @nor: pointer to a 'struct spi_nor'
@@ -1603,7 +2045,7 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
int ret;
/* Check current Quad Enable bit value. */
- ret = nor->read_reg(nor, SPINOR_OP_RDSR2, &sr2, 1);
+ ret = spi_nor_read_sr2(nor, &sr2);
if (ret)
return ret;
if (sr2 & SR2_QUAD_EN_BIT7)
@@ -1614,7 +2056,7 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
write_enable(nor);
- ret = nor->write_reg(nor, SPINOR_OP_WRSR2, &sr2, 1);
+ ret = spi_nor_write_sr2(nor, sr2);
if (ret < 0) {
dev_err(nor->dev, "error while writing status register 2\n");
return -EINVAL;
@@ -1626,8 +2068,7 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
return ret;
}
- /* Read back and check it. */
- ret = nor->read_reg(nor, SPINOR_OP_RDSR2, &sr2, 1);
+ ret = spi_nor_read_sr2(nor, &sr2);
if (!(ret > 0 && (sr2 & SR2_QUAD_EN_BIT7))) {
dev_err(nor->dev, "SR2 Quad bit not set\n");
return -EINVAL;
@@ -2180,7 +2621,18 @@ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
u8 id[SPI_NOR_MAX_ID_LEN];
const struct flash_info *info;
- tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
+ if (nor->spimem) {
+ struct spi_mem_op op =
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
+ SPI_MEM_OP_NO_ADDR,
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_IN(0, NULL, 1));
+
+ tmp = spi_nor_data_op(nor, &op, id, SPI_NOR_MAX_ID_LEN);
+ } else {
+ tmp = nor->read_reg(nor, SPINOR_OP_RDID, id,
+ SPI_NOR_MAX_ID_LEN);
+ }
if (tmp < 0) {
dev_err(nor->dev, "error %d reading JEDEC ID\n", tmp);
return ERR_PTR(tmp);
@@ -2216,7 +2668,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT)
addr = spi_nor_s3an_addr_convert(nor, addr);
- ret = nor->read(nor, addr, len, buf);
+ ret = spi_nor_read_data(nor, addr, len, buf);
if (ret == 0) {
/* We shouldn't see 0-length reads */
ret = -EIO;
@@ -2261,7 +2713,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
nor->program_opcode = SPINOR_OP_BP;
/* write one byte. */
- ret = nor->write(nor, to, 1, buf);
+ ret = spi_nor_write_data(nor, to, 1, buf);
if (ret < 0)
goto sst_write_err;
WARN(ret != 1, "While writing 1 byte written %i bytes\n",
@@ -2277,7 +2729,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
nor->program_opcode = SPINOR_OP_AAI_WP;
/* write two bytes. */
- ret = nor->write(nor, to, 2, buf + actual);
+ ret = spi_nor_write_data(nor, to, 2, buf + actual);
if (ret < 0)
goto sst_write_err;
WARN(ret != 2, "While writing 2 bytes written %i bytes\n",
@@ -2300,7 +2752,7 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
write_enable(nor);
nor->program_opcode = SPINOR_OP_BP;
- ret = nor->write(nor, to, 1, buf + actual);
+ ret = spi_nor_write_data(nor, to, 1, buf + actual);
if (ret < 0)
goto sst_write_err;
WARN(ret != 1, "While writing 1 byte written %i bytes\n",
@@ -2362,7 +2814,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
addr = spi_nor_s3an_addr_convert(nor, addr);
write_enable(nor);
- ret = nor->write(nor, addr, page_remain, buf + i);
+ ret = spi_nor_write_data(nor, addr, page_remain, buf + i);
if (ret < 0)
goto write_err;
written = ret;
@@ -2381,8 +2833,10 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
static int spi_nor_check(struct spi_nor *nor)
{
- if (!nor->dev || !nor->read || !nor->write ||
- !nor->read_reg || !nor->write_reg) {
+ if (!nor->dev ||
+ (!nor->spimem &&
+ (!nor->read || !nor->write || !nor->read_reg ||
+ !nor->write_reg))) {
pr_err("spi-nor: please fill all the necessary fields!\n");
return -EINVAL;
}
@@ -2395,7 +2849,7 @@ static int s3an_nor_scan(struct spi_nor *nor)
int ret;
u8 val;
- ret = nor->read_reg(nor, SPINOR_OP_XRDSR, &val, 1);
+ ret = spi_nor_xread_sr(nor, &val);
if (ret < 0) {
dev_err(nor->dev, "error %d reading XRDSR\n", (int) ret);
return ret;
@@ -2525,7 +2979,7 @@ static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf)
int ret;
while (len) {
- ret = nor->read(nor, addr, len, buf);
+ ret = spi_nor_read_data(nor, addr, len, buf);
if (!ret || ret > len)
return -EIO;
if (ret < 0)
@@ -4316,6 +4770,208 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
}
EXPORT_SYMBOL_GPL(spi_nor_scan);
+static int spi_nor_probe(struct spi_mem *spimem)
+{
+ struct spi_device *spi = spimem->spi;
+ struct flash_platform_data *data = dev_get_platdata(&spi->dev);
+ struct spi_nor *nor;
+ struct spi_nor_hwcaps hwcaps = {
+ .mask = SNOR_HWCAPS_READ |
+ SNOR_HWCAPS_READ_FAST |
+ SNOR_HWCAPS_PP,
+ };
+ char *flash_name;
+ int ret;
+
+ nor = devm_kzalloc(&spi->dev, sizeof(*nor), GFP_KERNEL);
+ if (!nor)
+ return -ENOMEM;
+
+ /*
+ * We need the bounce buffer early to read/write registers when going
+ * through the spi-mem layer (buffers have to be DMA-able).
+ * We'll reallocate a new buffer if nor->page_size turns out to be
+ * greater than PAGE_SIZE (which shouldn't happen before long since NOR
+ * pages are usually less than 1KB) after spi_nor_scan() returns.
+ */
+ nor->bouncebuf_size = PAGE_SIZE;
+ nor->bouncebuf = devm_kmalloc(&spi->dev, nor->bouncebuf_size,
+ GFP_KERNEL);
+ if (!nor->bouncebuf)
+ return -ENOMEM;
+
+ nor->spimem = spimem;
+ nor->dev = &spi->dev;
+ spi_nor_set_flash_node(nor, spi->dev.of_node);
+
+ spi_mem_set_drvdata(spimem, nor);
+
+ if (spi->mode & SPI_RX_OCTAL) {
+ hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
+
+ if (spi->mode & SPI_TX_OCTAL)
+ hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 |
+ SNOR_HWCAPS_PP_1_1_8 |
+ SNOR_HWCAPS_PP_1_8_8);
+ } else if (spi->mode & SPI_RX_QUAD) {
+ hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
+
+ if (spi->mode & SPI_TX_QUAD)
+ hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
+ SNOR_HWCAPS_PP_1_1_4 |
+ SNOR_HWCAPS_PP_1_4_4);
+ } else if (spi->mode & SPI_RX_DUAL) {
+ hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
+
+ if (spi->mode & SPI_TX_DUAL)
+ hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
+ }
+
+ if (data && data->name)
+ nor->mtd.name = data->name;
+
+ if (!nor->mtd.name)
+ nor->mtd.name = spi_mem_get_name(spimem);
+
+ /*
+ * For some (historical?) reason many platforms provide two different
+ * names in flash_platform_data: "name" and "type". Quite often name is
+ * set to "m25p80" and then "type" provides a real chip name.
+ * If that's the case, respect "type" and ignore a "name".
+ */
+ if (data && data->type)
+ flash_name = data->type;
+ else if (!strcmp(spi->modalias, "spi-nor"))
+ flash_name = NULL; /* auto-detect */
+ else
+ flash_name = spi->modalias;
+
+ ret = spi_nor_scan(nor, flash_name, &hwcaps);
+ if (ret)
+ return ret;
+
+ /*
+ * None of the existing parts have > 512B pages, but let's play safe
+ * and add this logic so that if anyone ever adds support for such
+ * a NOR we don't end up with buffer overflows.
+ */
+ if (nor->page_size > PAGE_SIZE) {
+ nor->bouncebuf_size = nor->page_size;
+ devm_kfree(nor->dev, nor->bouncebuf);
+ nor->bouncebuf = devm_kmalloc(nor->dev,
+ nor->bouncebuf_size,
+ GFP_KERNEL);
+ if (!nor->bouncebuf)
+ return -ENOMEM;
+ }
+
+ return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
+ data ? data->nr_parts : 0);
+}
+
+static int spi_nor_remove(struct spi_mem *spimem)
+{
+ struct spi_nor *nor = spi_mem_get_drvdata(spimem);
+
+ spi_nor_restore(nor);
+
+ /* Clean up MTD stuff. */
+ return mtd_device_unregister(&nor->mtd);
+}
+
+static void spi_nor_shutdown(struct spi_mem *spimem)
+{
+ struct spi_nor *nor = spi_mem_get_drvdata(spimem);
+
+ spi_nor_restore(nor);
+}
+
+/*
+ * Do NOT add to this array without reading the following:
+ *
+ * Historically, many flash devices are bound to this driver by their name. But
+ * since most of these flash are compatible to some extent, and their
+ * differences can often be differentiated by the JEDEC read-ID command, we
+ * encourage new users to add support to the spi-nor library, and simply bind
+ * against a generic string here (e.g., "jedec,spi-nor").
+ *
+ * Many flash names are kept here in this list (as well as in spi-nor.c) to
+ * keep them available as module aliases for existing platforms.
+ */
+static const struct spi_device_id spi_nor_dev_ids[] = {
+ /*
+ * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
+ * hack around the fact that the SPI core does not provide uevent
+ * matching for .of_match_table
+ */
+ {"spi-nor"},
+
+ /*
+ * Entries not used in DTs that should be safe to drop after replacing
+ * them with "spi-nor" in platform data.
+ */
+ {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
+
+ /*
+ * Entries that were used in DTs without "jedec,spi-nor" fallback and
+ * should be kept for backward compatibility.
+ */
+ {"at25df321a"}, {"at25df641"}, {"at26df081a"},
+ {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
+ {"mx25l25635e"},{"mx66l51235l"},
+ {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
+ {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
+ {"s25fl064k"},
+ {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
+ {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
+ {"m25p64"}, {"m25p128"},
+ {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
+ {"w25q80bl"}, {"w25q128"}, {"w25q256"},
+
+ /* Flashes that can't be detected using JEDEC */
+ {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
+ {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
+ {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
+
+ /* Everspin MRAMs (non-JEDEC) */
+ { "mr25h128" }, /* 128 Kib, 40 MHz */
+ { "mr25h256" }, /* 256 Kib, 40 MHz */
+ { "mr25h10" }, /* 1 Mib, 40 MHz */
+ { "mr25h40" }, /* 4 Mib, 40 MHz */
+
+ { },
+};
+MODULE_DEVICE_TABLE(spi, spi_nor_dev_ids);
+
+static const struct of_device_id spi_nor_of_table[] = {
+ /*
+ * Generic compatibility for SPI NOR that can be identified by the
+ * JEDEC READ ID opcode (0x9F). Use this, if possible.
+ */
+ { .compatible = "jedec,spi-nor" },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, spi_nor_of_table);
+
+/*
+ * REVISIT: many of these chips have deep power-down modes, which
+ * should clearly be entered on suspend() to minimize power use.
+ * And also when they're otherwise idle...
+ */
+static struct spi_mem_driver spi_nor_driver = {
+ .spidrv = {
+ .driver = {
+ .name = "spi-nor",
+ .of_match_table = spi_nor_of_table,
+ },
+ .id_table = spi_nor_dev_ids,
+ },
+ .probe = spi_nor_probe,
+ .remove = spi_nor_remove,
+ .shutdown = spi_nor_shutdown,
+};
+module_spi_mem_driver(spi_nor_driver);
+
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Huang Shijie <shijie8@gmail.com>");
MODULE_AUTHOR("Mike Lavender");
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 9f57cdfcc93d..e18c03f72ded 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -9,6 +9,7 @@
#include <linux/bitops.h>
#include <linux/mtd/cfi.h>
#include <linux/mtd/mtd.h>
+#include <linux/spi/spi-mem.h>
/*
* Manufacturer IDs
@@ -344,6 +345,10 @@ struct flash_info;
* @mtd: point to a mtd_info structure
* @lock: the lock for the read/write/erase/lock/unlock operations
* @dev: point to a spi device, or a spi nor controller device.
+ * @spimem: point to the spi mem device
+ * @bouncebuf: bounce buffer used when the buffer passed by the MTD
+ * layer is not DMA-able
+ * @bouncebuf_size: size of the bounce buffer
* @info: spi-nor part JDEC MFR id and other info
* @page_size: the page size of the SPI NOR
* @addr_width: number of address bytes
@@ -382,6 +387,9 @@ struct spi_nor {
struct mtd_info mtd;
struct mutex lock;
struct device *dev;
+ struct spi_mem *spimem;
+ void *bouncebuf;
+ size_t bouncebuf_size;
const struct flash_info *info;
u32 page_size;
u8 addr_width;
--
2.22.0
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/2] mtd: spi-nor: Rework hwcaps selection for the spi-mem case
2019-07-20 8:00 [PATCH v2 0/2] ] Merge m25p80 into spi-nor Vignesh Raghavendra
2019-07-20 8:00 ` [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c Vignesh Raghavendra
@ 2019-07-20 8:00 ` Vignesh Raghavendra
1 sibling, 0 replies; 12+ messages in thread
From: Vignesh Raghavendra @ 2019-07-20 8:00 UTC (permalink / raw)
To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus
Cc: Marek Vasut, Yogesh Narayan Gaur, linux-mtd, linux-kernel,
Boris Brezillon
From: Boris Brezillon <boris.brezillon@bootlin.com>
The spi-mem layer provides a spi_mem_supports_op() function to check
whether a specific operation is supported by the controller or not.
This is much more accurate than the hwcaps selection logic based on
SPI_{RX,TX}_ flags.
Rework the hwcaps selection logic to use spi_mem_supports_op() when
nor->spimem != NULL.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
v2:
Refractor spi_nor_spimem_adjust_hwcaps to avoid looping twice over
WCAPS
Add docs to new functions
Rework spi_nor_spimem_check_op() logic
drivers/mtd/spi-nor/spi-nor.c | 183 +++++++++++++++++++++++++++-------
include/linux/mtd/spi-nor.h | 14 +++
2 files changed, 161 insertions(+), 36 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index f428a6d4022b..924dbaf3fa49 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -3028,6 +3028,129 @@ static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,
return ret;
}
+/**
+ * spi_nor_spimem_check_op - check if the operation is supported
+ * by controller
+ *@nor: pointer to a 'struct spi_nor'
+ *@op: pointer to op template to be checked
+ *
+ * Returns 0 if operation is supported, -ENOTSUPP otherwise.
+ */
+static int spi_nor_spimem_check_op(struct spi_nor *nor,
+ struct spi_mem_op *op)
+{
+ /*
+ * First test with 4 address bytes. The opcode itself might
+ * be a 3B addressing opcode but we don't care, because
+ * SPI controller implementation should not check the opcode,
+ * but just the sequence.
+ */
+ op->addr.nbytes = 4;
+ if (!spi_mem_supports_op(nor->spimem, op)) {
+ /* If flash size <16MB, 3 address bytes are sufficient */
+ if (nor->mtd.size <= SZ_16M) {
+ op->addr.nbytes = 3;
+ if (!spi_mem_supports_op(nor->spimem, op))
+ return -ENOTSUPP;
+ }
+ }
+
+ return 0;
+}
+
+/**
+ * spi_nor_spimem_check_readop - check if the read op is supported
+ * by controller
+ *@nor: pointer to a 'struct spi_nor'
+ *@read: pointer to op template to be checked
+ *
+ * Returns 0 if operation is supported, -ENOTSUPP otherwise.
+ */
+static int spi_nor_spimem_check_readop(struct spi_nor *nor,
+ const struct spi_nor_read_command *read)
+{
+ struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(read->opcode, 1),
+ SPI_MEM_OP_ADDR(3, 0, 1),
+ SPI_MEM_OP_DUMMY(0, 1),
+ SPI_MEM_OP_DATA_IN(0, NULL, 1));
+
+ op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(read->proto);
+ op.addr.buswidth = spi_nor_get_protocol_addr_nbits(read->proto);
+ op.data.buswidth = spi_nor_get_protocol_data_nbits(read->proto);
+ op.dummy.buswidth = op.addr.buswidth;
+ op.dummy.nbytes = (read->num_mode_clocks + read->num_wait_states) *
+ op.dummy.buswidth / 8;
+
+ return spi_nor_spimem_check_op(nor, &op);
+}
+
+/**
+ * spi_nor_spimem_check_pp - check if the page program op is supported
+ * by controller
+ *@nor: pointer to a 'struct spi_nor'
+ *@pp: pointer to op template to be checked
+ *
+ * Returns 0 if operation is supported, -ENOTSUPP otherwise.
+ */
+static int spi_nor_spimem_check_pp(struct spi_nor *nor,
+ const struct spi_nor_pp_command *pp)
+{
+ struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(pp->opcode, 1),
+ SPI_MEM_OP_ADDR(3, 0, 1),
+ SPI_MEM_OP_NO_DUMMY,
+ SPI_MEM_OP_DATA_OUT(0, NULL, 1));
+
+ op.cmd.buswidth = spi_nor_get_protocol_inst_nbits(pp->proto);
+ op.addr.buswidth = spi_nor_get_protocol_addr_nbits(pp->proto);
+ op.data.buswidth = spi_nor_get_protocol_data_nbits(pp->proto);
+
+ return spi_nor_spimem_check_op(nor, &op);
+}
+
+/**
+ * spi_nor_spimem_adjust_hwcaps - Find optimal Read/Write protocol
+ * based on SPI controller capabilities
+ * @nor: pointer to a 'struct spi_nor'
+ * @params: pointer to the 'struct spi_nor_flash_parameter'
+ * representing SPI NOR flash capabilities
+ * @hwcaps: pointer to resulting capabilities after adjusting
+ * according to controller and flash's capability
+ */
+static void
+spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor,
+ const struct spi_nor_flash_parameter *params,
+ u32 *hwcaps)
+{
+ unsigned int cap;
+
+ /* DTR modes are not supported yet, mask them all. */
+ *hwcaps &= ~SNOR_HWCAPS_DTR;
+
+ /* X-X-X modes are not supported yet, mask them all. */
+ *hwcaps &= ~SNOR_HWCAPS_X_X_X;
+
+ /* Start with read commands. */
+ for (cap = 0; cap < sizeof(*hwcaps) * BITS_PER_BYTE; cap++) {
+ int rdidx, ppidx;
+
+ if (!(*hwcaps & BIT(cap)))
+ continue;
+
+ rdidx = spi_nor_hwcaps_read2cmd(BIT(cap));
+ if (rdidx >= 0 &&
+ spi_nor_spimem_check_readop(nor, ¶ms->reads[rdidx]))
+ *hwcaps &= ~BIT(cap);
+
+ ppidx = spi_nor_hwcaps_pp2cmd(BIT(cap));
+ if (ppidx < 0)
+ continue;
+
+ if (spi_nor_spimem_check_pp(nor,
+ ¶ms->page_programs[ppidx]))
+ *hwcaps &= ~BIT(cap);
+ }
+}
+
/**
* spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.
* @nor: pointer to a 'struct spi_nor'
@@ -4437,16 +4560,25 @@ static int spi_nor_setup(struct spi_nor *nor,
*/
shared_mask = hwcaps->mask & params->hwcaps.mask;
- /* SPI n-n-n protocols are not supported yet. */
- ignored_mask = (SNOR_HWCAPS_READ_2_2_2 |
- SNOR_HWCAPS_READ_4_4_4 |
- SNOR_HWCAPS_READ_8_8_8 |
- SNOR_HWCAPS_PP_4_4_4 |
- SNOR_HWCAPS_PP_8_8_8);
- if (shared_mask & ignored_mask) {
- dev_dbg(nor->dev,
- "SPI n-n-n protocols are not supported yet.\n");
- shared_mask &= ~ignored_mask;
+ if (nor->spimem) {
+ /*
+ * When called from spi_nor_probe(), all caps are set and we
+ * need to discard some of them based on what the SPI
+ * controller actually supports (using spi_mem_supports_op()).
+ */
+ spi_nor_spimem_adjust_hwcaps(nor, params, &shared_mask);
+ } else {
+ /*
+ * SPI n-n-n protocols are not supported when the SPI
+ * controller directly implements the spi_nor interface.
+ * Yet another reason to switch to spi-mem.
+ */
+ ignored_mask = SNOR_HWCAPS_X_X_X;
+ if (shared_mask & ignored_mask) {
+ dev_dbg(nor->dev,
+ "SPI n-n-n protocols are not supported.\n");
+ shared_mask &= ~ignored_mask;
+ }
}
/* Select the (Fast) Read command. */
@@ -4775,11 +4907,11 @@ static int spi_nor_probe(struct spi_mem *spimem)
struct spi_device *spi = spimem->spi;
struct flash_platform_data *data = dev_get_platdata(&spi->dev);
struct spi_nor *nor;
- struct spi_nor_hwcaps hwcaps = {
- .mask = SNOR_HWCAPS_READ |
- SNOR_HWCAPS_READ_FAST |
- SNOR_HWCAPS_PP,
- };
+ /*
+ * Enable all caps by default. The core will mask them after
+ * checking what's really supported using spi_mem_supports_op().
+ */
+ const struct spi_nor_hwcaps hwcaps = { .mask = SNOR_HWCAPS_ALL };
char *flash_name;
int ret;
@@ -4806,27 +4938,6 @@ static int spi_nor_probe(struct spi_mem *spimem)
spi_mem_set_drvdata(spimem, nor);
- if (spi->mode & SPI_RX_OCTAL) {
- hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
-
- if (spi->mode & SPI_TX_OCTAL)
- hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 |
- SNOR_HWCAPS_PP_1_1_8 |
- SNOR_HWCAPS_PP_1_8_8);
- } else if (spi->mode & SPI_RX_QUAD) {
- hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
-
- if (spi->mode & SPI_TX_QUAD)
- hwcaps.mask |= (SNOR_HWCAPS_READ_1_4_4 |
- SNOR_HWCAPS_PP_1_1_4 |
- SNOR_HWCAPS_PP_1_4_4);
- } else if (spi->mode & SPI_RX_DUAL) {
- hwcaps.mask |= SNOR_HWCAPS_READ_1_1_2;
-
- if (spi->mode & SPI_TX_DUAL)
- hwcaps.mask |= SNOR_HWCAPS_READ_1_2_2;
- }
-
if (data && data->name)
nor->mtd.name = data->name;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index e18c03f72ded..4521a38452d6 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -526,6 +526,20 @@ struct spi_nor_hwcaps {
#define SNOR_HWCAPS_PP_1_8_8 BIT(21)
#define SNOR_HWCAPS_PP_8_8_8 BIT(22)
+#define SNOR_HWCAPS_X_X_X (SNOR_HWCAPS_READ_2_2_2 | \
+ SNOR_HWCAPS_READ_4_4_4 | \
+ SNOR_HWCAPS_READ_8_8_8 | \
+ SNOR_HWCAPS_PP_4_4_4 | \
+ SNOR_HWCAPS_PP_8_8_8)
+
+#define SNOR_HWCAPS_DTR (SNOR_HWCAPS_READ_1_1_1_DTR | \
+ SNOR_HWCAPS_READ_1_2_2_DTR | \
+ SNOR_HWCAPS_READ_1_4_4_DTR | \
+ SNOR_HWCAPS_READ_1_8_8_DTR)
+
+#define SNOR_HWCAPS_ALL (SNOR_HWCAPS_READ_MASK | \
+ SNOR_HWCAPS_PP_MASK)
+
/**
* spi_nor_scan() - scan the SPI NOR
* @nor: the spi_nor structure
--
2.22.0
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-20 8:00 ` [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c Vignesh Raghavendra
@ 2019-07-25 11:19 ` Tudor.Ambarus
2019-07-25 11:44 ` Tudor.Ambarus
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2019-07-25 11:19 UTC (permalink / raw)
To: vigneshr, miquel.raynal, richard, marek.vasut
Cc: marek.vasut, yogeshnarayan.gaur, linux-mtd, linux-kernel, bbrezillon
All,
I want this in 5.4, please review/test the soonest.
On 07/20/2019 11:00 AM, Vignesh Raghavendra wrote:
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 03cc788511d5..f428a6d4022b 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -19,6 +19,7 @@
>
> #include <linux/mtd/mtd.h>
> #include <linux/of_platform.h>
> +#include <linux/sched/task_stack.h>
> #include <linux/spi/flash.h>
> #include <linux/mtd/spi-nor.h>
>
> @@ -288,6 +289,232 @@ struct flash_info {
>
> #define JEDEC_MFR(info) ((info)->id[0])
>
> +/**
> + * spi_nor_exec_op() - helper function to read/write flash registers
the function name can easily get confused with spi_mem_exec_op(). How about
renaming it to spi_nor_spimem_xfer_reg(), it will be in concordance with
spi_nor_spimem_xfer_data().
> + * @nor: pointer to 'struct spi_nor'
> + * @op: pointer to 'struct spi_mem_op' template for transfer
> + * @addr: pointer to offset within flash
> + * @buf: pointer to data buffer into which data is read/written
> + * into
^ drop second into
> + * @len: length of the transfer
> + *
> + * Return: 0 on success, non-zero otherwise
^ s/non-zero/-errno?
> + */
> +static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
> + u64 *addr, void *buf, size_t len)
> +{
> + int ret;
> + bool usebouncebuf = false;
I don't think we need a bounce buffer for regs. What is the maximum size that we
read/write regs, SPI_NOR_MAX_CMD_SIZE(8)?
In spi-nor.c the maximum length that we pass to nor->read_reg()/write_reg() is
SPI_NOR_MAX_ID_LEN(6).
I can provide a patch to always use nor->cmd_buf when reading/writing regs so
you respin the series on top of it, if you feel the same.
With nor->cmd_buf this function will be reduced to the following:
static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
{
if (!op || (op->data.nbytes && !nor->cmd_buf))
return -EINVAL;
return spi_mem_exec_op(nor->spimem, op);
}
spi_nor_exec_op() always received a NULL addr, let's get rid of it. We won't
need buf anymore and you can retrieve the length from op->data.nbytes. Now that
we trimmed the arguments, I think I would get rid of the
spi_nor_data/nodata_op() wrappers and use spi_nor_spimem_xfer_reg() directly.
> +
> + if (!op || (len && !buf))
> + return -EINVAL;
> +
> + if (op->addr.nbytes && addr)
> + op->addr.val = *addr;
> +
> + op->data.nbytes = len;
> +
> + if (object_is_on_stack(buf) || !virt_addr_valid(buf))
> + usebouncebuf = true;
> + if (len && usebouncebuf) {
> + if (len > nor->bouncebuf_size)
> + return -ENOTSUPP;
> +
> + if (op->data.dir == SPI_MEM_DATA_IN) {
> + op->data.buf.in = nor->bouncebuf;
> + } else {
> + op->data.buf.out = nor->bouncebuf;
> + memcpy(nor->bouncebuf, buf, len);
> + }
> + } else {
> + op->data.buf.out = buf;
> + }
> +
> + ret = spi_mem_exec_op(nor->spimem, op);
> + if (ret)
> + return ret;
> +
> + if (usebouncebuf && len && op->data.dir == SPI_MEM_DATA_IN)
> + memcpy(buf, nor->bouncebuf, len);
> +
> + return 0;
> +}
cut
> +
> +/**
> + * spi_nor_spimem_xfer_data() - helper function to read/write data to
> + * flash's memory region
> + * @nor: pointer to 'struct spi_nor'
> + * @op: pointer to 'struct spi_mem_op' template for transfer
> + * @proto: protocol to be used for transfer
> + *
> + * Return: number of bytes transferred on success, -errno otherwise
> + */
> +static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
> + struct spi_mem_op *op,
> + enum spi_nor_protocol proto)
> +{
> + bool usebouncebuf = false;
declare bool at the end to avoid stack padding.
> + void *rdbuf = NULL;
> + const void *buf;
you can get rid of rdbuf and buf if you pass buf as argument.
> + int ret;
> +
> + /* get transfer protocols. */
> + op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(proto);
> + op->addr.buswidth = spi_nor_get_protocol_addr_nbits(proto);
> + op->data.buswidth = spi_nor_get_protocol_data_nbits(proto);
> +
> + if (op->data.dir == SPI_MEM_DATA_IN)
> + buf = op->data.buf.in;
> + else
> + buf = op->data.buf.out;
> +
> + if (object_is_on_stack(buf) || !virt_addr_valid(buf))
> + usebouncebuf = true;
> +
> + if (usebouncebuf) {
> + if (op->data.nbytes > nor->bouncebuf_size)
> + op->data.nbytes = nor->bouncebuf_size;
> +
> + if (op->data.dir == SPI_MEM_DATA_IN) {
> + rdbuf = op->data.buf.in;
> + op->data.buf.in = nor->bouncebuf;
> + } else {
> + op->data.buf.out = nor->bouncebuf;
> + memcpy(nor->bouncebuf, buf,
> + op->data.nbytes);
> + }
> + }
> +
> + ret = spi_mem_adjust_op_size(nor->spimem, op);
> + if (ret)
> + return ret;
> +
> + ret = spi_mem_exec_op(nor->spimem, op);
> + if (ret)
> + return ret;
> +
> + if (usebouncebuf && op->data.dir == SPI_MEM_DATA_IN)
> + memcpy(rdbuf, nor->bouncebuf, op->data.nbytes);
> +
> + return op->data.nbytes;
> +}
> +
> +/**
> + * spi_nor_spimem_read_data() - read data from flash's memory region via
> + * spi-mem
> + * @nor: pointer to 'struct spi_nor'
> + * @ofs: offset to read from
> + * @len: number of bytes to read
> + * @buf: pointer to dst buffer
> + *
> + * Return: number of bytes read successfully, -errno otherwise
> + */
> +static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t ofs,
s/ofs/from? both flash and buf may have offsets, "from" better indicates that
the offset is associated with the flash.
> + size_t len, u8 *buf)
> +{
> + struct spi_mem_op op =
> + SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
> + SPI_MEM_OP_ADDR(nor->addr_width, ofs, 1),
> + SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
> + SPI_MEM_OP_DATA_IN(len, buf, 1));
> +
> + op.dummy.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
> +
> + /* convert the dummy cycles to the number of bytes */
> + op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
> +
> + return spi_nor_spimem_xfer_data(nor, &op, nor->read_proto);
stop passing nor->read_proto and do all buswidth initialization here. This way
we'll keep the inits all gathered together, and will have the xfer() that will
do just the transfer (with bouncebuffer if needed). Function that does a single
thing.
> +}
cut
> @@ -459,7 +749,6 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor)
> struct spi_nor_erase_map *map = &nor->erase_map;
> struct spi_nor_erase_type *erase;
> int i;
> -
keep the blank line
cut
> @@ -1406,7 +1807,18 @@ static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr)
>
> write_enable(nor);
>
> - ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
> + if (nor->spimem) {
> + struct spi_mem_op op =
> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 1),
> + SPI_MEM_OP_NO_ADDR,
> + SPI_MEM_OP_NO_DUMMY,
> + SPI_MEM_OP_DATA_OUT(0, NULL, 1));
nbytes is 2.
> +
> + ret = spi_nor_data_op(nor, &op, sr_cr, 2);
> + } else {
> + ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
> + }
cut
> @@ -1626,8 +2068,7 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
> return ret;
> }
>
> - /* Read back and check it. */
don't drop the comment
> - ret = nor->read_reg(nor, SPINOR_OP_RDSR2, &sr2, 1);
> + ret = spi_nor_read_sr2(nor, &sr2);
> if (!(ret > 0 && (sr2 & SR2_QUAD_EN_BIT7))) {
> dev_err(nor->dev, "SR2 Quad bit not set\n");
> return -EINVAL;
> @@ -2180,7 +2621,18 @@ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
> u8 id[SPI_NOR_MAX_ID_LEN];
> const struct flash_info *info;
>
> - tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
> + if (nor->spimem) {
> + struct spi_mem_op op =
> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
> + SPI_MEM_OP_NO_ADDR,
> + SPI_MEM_OP_NO_DUMMY,
> + SPI_MEM_OP_DATA_IN(0, NULL, 1));
nbytes is SPI_NOR_MAX_ID_LEN and not 1.
Cheers,
ta
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-25 11:19 ` Tudor.Ambarus
@ 2019-07-25 11:44 ` Tudor.Ambarus
2019-07-25 12:37 ` Boris Brezillon
2019-07-30 18:04 ` Vignesh Raghavendra
2 siblings, 0 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2019-07-25 11:44 UTC (permalink / raw)
To: vigneshr, miquel.raynal, richard, marek.vasut
Cc: yogeshnarayan.gaur, linux-mtd, linux-kernel, bbrezillon
On 07/25/2019 02:19 PM, Tudor.Ambarus@microchip.com wrote:
> static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
> {
> if (!op || (op->data.nbytes && !nor->cmd_buf))
!nor->cmd_buf can't be NULL, we can get rid of this check too, and use
spi_mem_exec_op() directly when interacting with registers.
> return -EINVAL;
>
> return spi_mem_exec_op(nor->spimem, op);
> }
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-25 11:19 ` Tudor.Ambarus
2019-07-25 11:44 ` Tudor.Ambarus
@ 2019-07-25 12:37 ` Boris Brezillon
2019-07-25 13:17 ` Tudor.Ambarus
2019-07-30 18:04 ` Vignesh Raghavendra
2 siblings, 1 reply; 12+ messages in thread
From: Boris Brezillon @ 2019-07-25 12:37 UTC (permalink / raw)
To: Tudor.Ambarus
Cc: yogeshnarayan.gaur, vigneshr, bbrezillon, richard, linux-kernel,
marek.vasut, linux-mtd, miquel.raynal
On Thu, 25 Jul 2019 11:19:06 +0000
<Tudor.Ambarus@microchip.com> wrote:
> > + */
> > +static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
> > + u64 *addr, void *buf, size_t len)
> > +{
> > + int ret;
> > + bool usebouncebuf = false;
>
> I don't think we need a bounce buffer for regs. What is the maximum size that we
> read/write regs, SPI_NOR_MAX_CMD_SIZE(8)?
>
> In spi-nor.c the maximum length that we pass to nor->read_reg()/write_reg() is
> SPI_NOR_MAX_ID_LEN(6).
>
> I can provide a patch to always use nor->cmd_buf when reading/writing regs so
> you respin the series on top of it, if you feel the same.
>
> With nor->cmd_buf this function will be reduced to the following:
>
> static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
> {
> if (!op || (op->data.nbytes && !nor->cmd_buf))
> return -EINVAL;
>
> return spi_mem_exec_op(nor->spimem, op);
> }
Well, I don't think that's a good idea. ->cmd_buf is an array in the
middle of the spi_nor struct, which means it won't be aligned on a
cache line and you'll have to be extra careful not to touch the spi_nor
fields when calling spi_mem_exec_op(). Might work, but I wouldn't take
the risk if I were you.
Another option would be to allocate ->cmd_buf with kmalloc() instead of
having it defined as a static array.
>
> spi_nor_exec_op() always received a NULL addr, let's get rid of it. We won't
> need buf anymore and you can retrieve the length from op->data.nbytes. Now that
> we trimmed the arguments, I think I would get rid of the
> spi_nor_data/nodata_op() wrappers and use spi_nor_spimem_xfer_reg() directly.
I think I added the addr param for a good reason (probably to support
Octo mode cmds that take an address parameter). This being said, I
agree with you, we should just pass everything through the op parameter
(including the address if we ever need to add one).
> > +
> > +/**
> > + * spi_nor_spimem_xfer_data() - helper function to read/write data to
> > + * flash's memory region
> > + * @nor: pointer to 'struct spi_nor'
> > + * @op: pointer to 'struct spi_mem_op' template for transfer
> > + * @proto: protocol to be used for transfer
> > + *
> > + * Return: number of bytes transferred on success, -errno otherwise
> > + */
> > +static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
> > + struct spi_mem_op *op,
> > + enum spi_nor_protocol proto)
> > +{
> > + bool usebouncebuf = false;
>
> declare bool at the end to avoid stack padding.
But it breaks the reverse-xmas-tree formatting :-).
>
> > + void *rdbuf = NULL;
> > + const void *buf;
>
> you can get rid of rdbuf and buf if you pass buf as argument.
Hm, passing the buffer to send data from/receive data into is already
part of the spi_mem_op definition process (which is done in the caller
of this func) so why bother passing an extra arg to the function.
Note that you had the exact opposite argument for the
spi_nor_spimem_xfer_reg() prototype you suggested above (which I
agree with BTW) :P.
>
> > + int ret;
> > +
> > + /* get transfer protocols. */
> > + op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(proto);
> > + op->addr.buswidth = spi_nor_get_protocol_addr_nbits(proto);
> > + op->data.buswidth = spi_nor_get_protocol_data_nbits(proto);
> > +
> > + if (op->data.dir == SPI_MEM_DATA_IN)
> > + buf = op->data.buf.in;
> > + else
> > + buf = op->data.buf.out;
> > +
> > + if (object_is_on_stack(buf) || !virt_addr_valid(buf))
> > + usebouncebuf = true;
> > +
> > + if (usebouncebuf) {
> > + if (op->data.nbytes > nor->bouncebuf_size)
> > + op->data.nbytes = nor->bouncebuf_size;
> > +
> > + if (op->data.dir == SPI_MEM_DATA_IN) {
> > + rdbuf = op->data.buf.in;
> > + op->data.buf.in = nor->bouncebuf;
> > + } else {
> > + op->data.buf.out = nor->bouncebuf;
> > + memcpy(nor->bouncebuf, buf,
> > + op->data.nbytes);
> > + }
> > + }
> > +
> > + ret = spi_mem_adjust_op_size(nor->spimem, op);
> > + if (ret)
> > + return ret;
> > +
> > + ret = spi_mem_exec_op(nor->spimem, op);
> > + if (ret)
> > + return ret;
> > +
> > + if (usebouncebuf && op->data.dir == SPI_MEM_DATA_IN)
> > + memcpy(rdbuf, nor->bouncebuf, op->data.nbytes);
> > +
> > + return op->data.nbytes;
> > +}
> > +
> > +/**
> > + * spi_nor_spimem_read_data() - read data from flash's memory region via
> > + * spi-mem
> > + * @nor: pointer to 'struct spi_nor'
> > + * @ofs: offset to read from
> > + * @len: number of bytes to read
> > + * @buf: pointer to dst buffer
> > + *
> > + * Return: number of bytes read successfully, -errno otherwise
> > + */
> > +static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t ofs,
>
> s/ofs/from? both flash and buf may have offsets, "from" better indicates that
> the offset is associated with the flash.
The semantic is well documented in the doc just above the function, but
I have the feeling that you're in 'nitpick' mode, so I'll just let you
pick the one you prefer :).
>
> > + size_t len, u8 *buf)
> > +{
> > + struct spi_mem_op op =
> > + SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
> > + SPI_MEM_OP_ADDR(nor->addr_width, ofs, 1),
> > + SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
> > + SPI_MEM_OP_DATA_IN(len, buf, 1));
> > +
> > + op.dummy.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
> > +
> > + /* convert the dummy cycles to the number of bytes */
> > + op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
> > +
> > + return spi_nor_spimem_xfer_data(nor, &op, nor->read_proto);
>
> stop passing nor->read_proto and do all buswidth initialization here. This way
> we'll keep the inits all gathered together, and will have the xfer() that will
> do just the transfer (with bouncebuffer if needed). Function that does a single
> thing.
Indeed, doesn't make sense to pass this info since it could be passed
through the op->data field.
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-25 12:37 ` Boris Brezillon
@ 2019-07-25 13:17 ` Tudor.Ambarus
2019-07-25 13:35 ` Tudor.Ambarus
2019-07-25 14:00 ` Boris Brezillon
0 siblings, 2 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2019-07-25 13:17 UTC (permalink / raw)
To: boris.brezillon
Cc: yogeshnarayan.gaur, vigneshr, bbrezillon, richard, linux-kernel,
marek.vasut, linux-mtd, miquel.raynal
Hi, Boris,
On 07/25/2019 03:37 PM, Boris Brezillon wrote:
> External E-Mail
>
>
> On Thu, 25 Jul 2019 11:19:06 +0000
> <Tudor.Ambarus@microchip.com> wrote:
>
>>> + */
>>> +static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
>>> + u64 *addr, void *buf, size_t len)
>>> +{
>>> + int ret;
>>> + bool usebouncebuf = false;
>>
>> I don't think we need a bounce buffer for regs. What is the maximum size that we
>> read/write regs, SPI_NOR_MAX_CMD_SIZE(8)?
>>
>> In spi-nor.c the maximum length that we pass to nor->read_reg()/write_reg() is
>> SPI_NOR_MAX_ID_LEN(6).
>>
>> I can provide a patch to always use nor->cmd_buf when reading/writing regs so
>> you respin the series on top of it, if you feel the same.
>>
>> With nor->cmd_buf this function will be reduced to the following:
>>
>> static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
>> {
>> if (!op || (op->data.nbytes && !nor->cmd_buf))
>> return -EINVAL;
>>
>> return spi_mem_exec_op(nor->spimem, op);
>> }
>
> Well, I don't think that's a good idea. ->cmd_buf is an array in the
> middle of the spi_nor struct, which means it won't be aligned on a
> cache line and you'll have to be extra careful not to touch the spi_nor
> fields when calling spi_mem_exec_op(). Might work, but I wouldn't take
> the risk if I were you.
>
u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE] ____cacheline_aligned;
Does this help?
> Another option would be to allocate ->cmd_buf with kmalloc() instead of
> having it defined as a static array.
>
>>
>> spi_nor_exec_op() always received a NULL addr, let's get rid of it. We won't
>> need buf anymore and you can retrieve the length from op->data.nbytes. Now that
>> we trimmed the arguments, I think I would get rid of the
>> spi_nor_data/nodata_op() wrappers and use spi_nor_spimem_xfer_reg() directly.
>
> I think I added the addr param for a good reason (probably to support
> Octo mode cmds that take an address parameter). This being said, I
> agree with you, we should just pass everything through the op parameter
> (including the address if we ever need to add one).
>
>
>>> +
>>> +/**
>>> + * spi_nor_spimem_xfer_data() - helper function to read/write data to
>>> + * flash's memory region
>>> + * @nor: pointer to 'struct spi_nor'
>>> + * @op: pointer to 'struct spi_mem_op' template for transfer
>>> + * @proto: protocol to be used for transfer
>>> + *
>>> + * Return: number of bytes transferred on success, -errno otherwise
>>> + */
>>> +static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
>>> + struct spi_mem_op *op,
>>> + enum spi_nor_protocol proto)
>>> +{
>>> + bool usebouncebuf = false;
>>
>> declare bool at the end to avoid stack padding.
>
> But it breaks the reverse-xmas-tree formatting :-).
>
>>
>>> + void *rdbuf = NULL;
>>> + const void *buf;
>>
>> you can get rid of rdbuf and buf if you pass buf as argument.
>
> Hm, passing the buffer to send data from/receive data into is already
> part of the spi_mem_op definition process (which is done in the caller
> of this func) so why bother passing an extra arg to the function.
> Note that you had the exact opposite argument for the
> spi_nor_spimem_xfer_reg() prototype you suggested above (which I
> agree with BTW) :P.
In order to avoid if clauses like "if (op->data.dir == SPI_MEM_DATA_IN)". You
can't use op->data.buf directly, the *out const qualifier can be discarded.
pointer to buf was not needed in spi_nor_spimem_xfer_reg(), we could use
nor->cmd_buf.
>
>>
>>> + int ret;
>>> +
>>> + /* get transfer protocols. */
>>> + op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(proto);
>>> + op->addr.buswidth = spi_nor_get_protocol_addr_nbits(proto);
>>> + op->data.buswidth = spi_nor_get_protocol_data_nbits(proto);
>>> +
>>> + if (op->data.dir == SPI_MEM_DATA_IN)
>>> + buf = op->data.buf.in;
>>> + else
>>> + buf = op->data.buf.out;
>>> +
>>> + if (object_is_on_stack(buf) || !virt_addr_valid(buf))
>>> + usebouncebuf = true;
>>> +
>>> + if (usebouncebuf) {
>>> + if (op->data.nbytes > nor->bouncebuf_size)
>>> + op->data.nbytes = nor->bouncebuf_size;
>>> +
>>> + if (op->data.dir == SPI_MEM_DATA_IN) {
>>> + rdbuf = op->data.buf.in;
>>> + op->data.buf.in = nor->bouncebuf;
>>> + } else {
>>> + op->data.buf.out = nor->bouncebuf;
>>> + memcpy(nor->bouncebuf, buf,
>>> + op->data.nbytes);
>>> + }
>>> + }
>>> +
>>> + ret = spi_mem_adjust_op_size(nor->spimem, op);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + ret = spi_mem_exec_op(nor->spimem, op);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + if (usebouncebuf && op->data.dir == SPI_MEM_DATA_IN)
>>> + memcpy(rdbuf, nor->bouncebuf, op->data.nbytes);
>>> +
>>> + return op->data.nbytes;
>>> +}
>>> +
>>> +/**
>>> + * spi_nor_spimem_read_data() - read data from flash's memory region via
>>> + * spi-mem
>>> + * @nor: pointer to 'struct spi_nor'
>>> + * @ofs: offset to read from
>>> + * @len: number of bytes to read
>>> + * @buf: pointer to dst buffer
>>> + *
>>> + * Return: number of bytes read successfully, -errno otherwise
>>> + */
>>> +static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t ofs,
>>
>> s/ofs/from? both flash and buf may have offsets, "from" better indicates that
>> the offset is associated with the flash.
>
> The semantic is well documented in the doc just above the function, but
> I have the feeling that you're in 'nitpick' mode, so I'll just let you
> pick the one you prefer :).
Not my intention. struct mtd_info and struct spi_nor use "from" when referring
to the offset from where to read in the read() calls. Just consistency reasons.
Cheers,
ta
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-25 13:17 ` Tudor.Ambarus
@ 2019-07-25 13:35 ` Tudor.Ambarus
2019-07-25 14:00 ` Boris Brezillon
1 sibling, 0 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2019-07-25 13:35 UTC (permalink / raw)
To: boris.brezillon
Cc: yogeshnarayan.gaur, vigneshr, bbrezillon, richard, linux-kernel,
marek.vasut, linux-mtd, miquel.raynal
On 07/25/2019 04:17 PM, Tudor Ambarus wrote:
>>>> +static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
>>>> + struct spi_mem_op *op,
>>>> + enum spi_nor_protocol proto)
>>>> +{
>>>> + bool usebouncebuf = false;
>>> declare bool at the end to avoid stack padding.
>> But it breaks the reverse-xmas-tree formatting :-).
>>
>>>> + void *rdbuf = NULL;
>>>> + const void *buf;
>>> you can get rid of rdbuf and buf if you pass buf as argument.
>> Hm, passing the buffer to send data from/receive data into is already
>> part of the spi_mem_op definition process (which is done in the caller
>> of this func) so why bother passing an extra arg to the function.
>> Note that you had the exact opposite argument for the
>> spi_nor_spimem_xfer_reg() prototype you suggested above (which I
>> agree with BTW) :P.
> In order to avoid if clauses like "if (op->data.dir == SPI_MEM_DATA_IN)". You
> can't use op->data.buf directly, the *out const qualifier can be discarded.
I'm wrong, the const qualifier will be discarded when passing the buf argument.
Please ignore.
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-25 13:17 ` Tudor.Ambarus
2019-07-25 13:35 ` Tudor.Ambarus
@ 2019-07-25 14:00 ` Boris Brezillon
2019-07-25 14:36 ` Tudor.Ambarus
1 sibling, 1 reply; 12+ messages in thread
From: Boris Brezillon @ 2019-07-25 14:00 UTC (permalink / raw)
To: Tudor.Ambarus
Cc: yogeshnarayan.gaur, vigneshr, bbrezillon, richard, linux-kernel,
marek.vasut, linux-mtd, miquel.raynal
On Thu, 25 Jul 2019 13:17:07 +0000
<Tudor.Ambarus@microchip.com> wrote:
> Hi, Boris,
>
> On 07/25/2019 03:37 PM, Boris Brezillon wrote:
> > External E-Mail
> >
> >
> > On Thu, 25 Jul 2019 11:19:06 +0000
> > <Tudor.Ambarus@microchip.com> wrote:
> >
> >>> + */
> >>> +static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
> >>> + u64 *addr, void *buf, size_t len)
> >>> +{
> >>> + int ret;
> >>> + bool usebouncebuf = false;
> >>
> >> I don't think we need a bounce buffer for regs. What is the maximum size that we
> >> read/write regs, SPI_NOR_MAX_CMD_SIZE(8)?
> >>
> >> In spi-nor.c the maximum length that we pass to nor->read_reg()/write_reg() is
> >> SPI_NOR_MAX_ID_LEN(6).
> >>
> >> I can provide a patch to always use nor->cmd_buf when reading/writing regs so
> >> you respin the series on top of it, if you feel the same.
> >>
> >> With nor->cmd_buf this function will be reduced to the following:
> >>
> >> static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
> >> {
> >> if (!op || (op->data.nbytes && !nor->cmd_buf))
> >> return -EINVAL;
> >>
> >> return spi_mem_exec_op(nor->spimem, op);
> >> }
> >
> > Well, I don't think that's a good idea. ->cmd_buf is an array in the
> > middle of the spi_nor struct, which means it won't be aligned on a
> > cache line and you'll have to be extra careful not to touch the spi_nor
> > fields when calling spi_mem_exec_op(). Might work, but I wouldn't take
> > the risk if I were you.
> >
>
> u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE] ____cacheline_aligned;
>
> Does this help?
I guess you'll also need one on the following field to guarantee that
cmd_buf is covering the whole cache line. TBH, I really prefer the
option of allocating ->cmd_buf.
>
> > Another option would be to allocate ->cmd_buf with kmalloc() instead of
> > having it defined as a static array.
> >
> >>
> >> spi_nor_exec_op() always received a NULL addr, let's get rid of it. We won't
> >> need buf anymore and you can retrieve the length from op->data.nbytes. Now that
> >> we trimmed the arguments, I think I would get rid of the
> >> spi_nor_data/nodata_op() wrappers and use spi_nor_spimem_xfer_reg() directly.
> >
> > I think I added the addr param for a good reason (probably to support
> > Octo mode cmds that take an address parameter). This being said, I
> > agree with you, we should just pass everything through the op parameter
> > (including the address if we ever need to add one).
> >
> >
> >>> +
> >>> +/**
> >>> + * spi_nor_spimem_xfer_data() - helper function to read/write data to
> >>> + * flash's memory region
> >>> + * @nor: pointer to 'struct spi_nor'
> >>> + * @op: pointer to 'struct spi_mem_op' template for transfer
> >>> + * @proto: protocol to be used for transfer
> >>> + *
> >>> + * Return: number of bytes transferred on success, -errno otherwise
> >>> + */
> >>> +static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
> >>> + struct spi_mem_op *op,
> >>> + enum spi_nor_protocol proto)
> >>> +{
> >>> + bool usebouncebuf = false;
> >>
> >> declare bool at the end to avoid stack padding.
> >
> > But it breaks the reverse-xmas-tree formatting :-).
> >
> >>
> >>> + void *rdbuf = NULL;
> >>> + const void *buf;
> >>
> >> you can get rid of rdbuf and buf if you pass buf as argument.
> >
> > Hm, passing the buffer to send data from/receive data into is already
> > part of the spi_mem_op definition process (which is done in the caller
> > of this func) so why bother passing an extra arg to the function.
> > Note that you had the exact opposite argument for the
> > spi_nor_spimem_xfer_reg() prototype you suggested above (which I
> > agree with BTW) :P.
>
> In order to avoid if clauses like "if (op->data.dir == SPI_MEM_DATA_IN)". You
> can't use op->data.buf directly, the *out const qualifier can be discarded.
Not entirely sure why you think this is important to avoid that
test (looks like a micro-optimization to me), but if you really want to
have a non-const buffer, just use the one pointed by op->data.buf.in
(buf is a union so both in and out point to the same thing). Note that
we'd need a comment explaining why this is safe to do that, because
bypassing constness constraints is usually a bad thing.
>
> pointer to buf was not needed in spi_nor_spimem_xfer_reg(), we could use
> nor->cmd_buf.
Do you mean that callers of spi_nor_spimem_xfer_data() should put data
into/read from ->cmd_buf and let spi_nor_spimem_xfer_data() assign
op->data.buf.{in,out} to ->cmd_buf?
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-25 14:00 ` Boris Brezillon
@ 2019-07-25 14:36 ` Tudor.Ambarus
0 siblings, 0 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2019-07-25 14:36 UTC (permalink / raw)
To: boris.brezillon
Cc: yogeshnarayan.gaur, vigneshr, bbrezillon, richard, linux-kernel,
marek.vasut, linux-mtd, miquel.raynal
On 07/25/2019 05:00 PM, Boris Brezillon wrote:
> External E-Mail
>
>
> On Thu, 25 Jul 2019 13:17:07 +0000
> <Tudor.Ambarus@microchip.com> wrote:
>
>> Hi, Boris,
>>
>> On 07/25/2019 03:37 PM, Boris Brezillon wrote:
>>> External E-Mail
>>>
>>>
>>> On Thu, 25 Jul 2019 11:19:06 +0000
>>> <Tudor.Ambarus@microchip.com> wrote:
>>>
>>>>> + */
>>>>> +static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
>>>>> + u64 *addr, void *buf, size_t len)
>>>>> +{
>>>>> + int ret;
>>>>> + bool usebouncebuf = false;
>>>>
>>>> I don't think we need a bounce buffer for regs. What is the maximum size that we
>>>> read/write regs, SPI_NOR_MAX_CMD_SIZE(8)?
>>>>
>>>> In spi-nor.c the maximum length that we pass to nor->read_reg()/write_reg() is
>>>> SPI_NOR_MAX_ID_LEN(6).
>>>>
>>>> I can provide a patch to always use nor->cmd_buf when reading/writing regs so
>>>> you respin the series on top of it, if you feel the same.
>>>>
>>>> With nor->cmd_buf this function will be reduced to the following:
>>>>
>>>> static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
>>>> {
>>>> if (!op || (op->data.nbytes && !nor->cmd_buf))
>>>> return -EINVAL;
>>>>
>>>> return spi_mem_exec_op(nor->spimem, op);
>>>> }
>>>
>>> Well, I don't think that's a good idea. ->cmd_buf is an array in the
>>> middle of the spi_nor struct, which means it won't be aligned on a
>>> cache line and you'll have to be extra careful not to touch the spi_nor
>>> fields when calling spi_mem_exec_op(). Might work, but I wouldn't take
>>> the risk if I were you.
>>>
>>
>> u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE] ____cacheline_aligned;
>>
>> Does this help?
>
> I guess you'll also need one on the following field to guarantee that
> cmd_buf is covering the whole cache line. TBH, I really prefer the
> option of allocating ->cmd_buf.
agreed.
>
>>
>>> Another option would be to allocate ->cmd_buf with kmalloc() instead of
>>> having it defined as a static array.
>>>
>>>>
>>>> spi_nor_exec_op() always received a NULL addr, let's get rid of it. We won't
>>>> need buf anymore and you can retrieve the length from op->data.nbytes. Now that
>>>> we trimmed the arguments, I think I would get rid of the
>>>> spi_nor_data/nodata_op() wrappers and use spi_nor_spimem_xfer_reg() directly.
>>>
>>> I think I added the addr param for a good reason (probably to support
>>> Octo mode cmds that take an address parameter). This being said, I
>>> agree with you, we should just pass everything through the op parameter
>>> (including the address if we ever need to add one).
>>>
>>>
>>>>> +
>>>>> +/**
>>>>> + * spi_nor_spimem_xfer_data() - helper function to read/write data to
>>>>> + * flash's memory region
>>>>> + * @nor: pointer to 'struct spi_nor'
>>>>> + * @op: pointer to 'struct spi_mem_op' template for transfer
>>>>> + * @proto: protocol to be used for transfer
>>>>> + *
>>>>> + * Return: number of bytes transferred on success, -errno otherwise
>>>>> + */
>>>>> +static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
>>>>> + struct spi_mem_op *op,
>>>>> + enum spi_nor_protocol proto)
>>>>> +{
>>>>> + bool usebouncebuf = false;
>>>>
>>>> declare bool at the end to avoid stack padding.
>>>
>>> But it breaks the reverse-xmas-tree formatting :-).
>>>
>>>>
>>>>> + void *rdbuf = NULL;
>>>>> + const void *buf;
>>>>
>>>> you can get rid of rdbuf and buf if you pass buf as argument.
>>>
>>> Hm, passing the buffer to send data from/receive data into is already
>>> part of the spi_mem_op definition process (which is done in the caller
>>> of this func) so why bother passing an extra arg to the function.
>>> Note that you had the exact opposite argument for the
>>> spi_nor_spimem_xfer_reg() prototype you suggested above (which I
>>> agree with BTW) :P.
>>
>> In order to avoid if clauses like "if (op->data.dir == SPI_MEM_DATA_IN)". You
>> can't use op->data.buf directly, the *out const qualifier can be discarded.
>
> Not entirely sure why you think this is important to avoid that
> test (looks like a micro-optimization to me), but if you really want to
> have a non-const buffer, just use the one pointed by op->data.buf.in
> (buf is a union so both in and out point to the same thing). Note that
> we'd need a comment explaining why this is safe to do that, because
> bypassing constness constraints is usually a bad thing.
No need for a buf argument, I missed that the const qualifier will be discarded
when passing the pointer. We'll keep the function as it is, with the amend that
the "enum spi_nor_protocol proto" will be removed from the arguments.
Thanks for jumping in,
ta
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-25 11:19 ` Tudor.Ambarus
2019-07-25 11:44 ` Tudor.Ambarus
2019-07-25 12:37 ` Boris Brezillon
@ 2019-07-30 18:04 ` Vignesh Raghavendra
2019-07-31 6:19 ` Tudor.Ambarus
2 siblings, 1 reply; 12+ messages in thread
From: Vignesh Raghavendra @ 2019-07-30 18:04 UTC (permalink / raw)
To: Tudor.Ambarus, miquel.raynal, richard, marek.vasut
Cc: yogeshnarayan.gaur, linux-mtd, linux-kernel, bbrezillon
Hi Tudor,
On 25-Jul-19 4:49 PM, Tudor.Ambarus@microchip.com wrote:
> All,
>
> I want this in 5.4, please review/test the soonest.
>
> On 07/20/2019 11:00 AM, Vignesh Raghavendra wrote:
>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 03cc788511d5..f428a6d4022b 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -19,6 +19,7 @@
>>
>> #include <linux/mtd/mtd.h>
>> #include <linux/of_platform.h>
>> +#include <linux/sched/task_stack.h>
>> #include <linux/spi/flash.h>
>> #include <linux/mtd/spi-nor.h>
>>
>> @@ -288,6 +289,232 @@ struct flash_info {
>>
>> #define JEDEC_MFR(info) ((info)->id[0])
>>
>> +/**
>> + * spi_nor_exec_op() - helper function to read/write flash registers
>
> the function name can easily get confused with spi_mem_exec_op(). How about
> renaming it to spi_nor_spimem_xfer_reg(), it will be in concordance with
> spi_nor_spimem_xfer_data().
>
>> + * @nor: pointer to 'struct spi_nor'
>> + * @op: pointer to 'struct spi_mem_op' template for transfer
>> + * @addr: pointer to offset within flash
>> + * @buf: pointer to data buffer into which data is read/written
>> + * into
>
> ^ drop second into
>
>> + * @len: length of the transfer
>> + *
>> + * Return: 0 on success, non-zero otherwise
>
> ^ s/non-zero/-errno?
>
>> + */
>> +static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
>> + u64 *addr, void *buf, size_t len)
>> +{
>> + int ret;
>> + bool usebouncebuf = false;
>
> I don't think we need a bounce buffer for regs. What is the maximum size that we
> read/write regs, SPI_NOR_MAX_CMD_SIZE(8)?
>
> In spi-nor.c the maximum length that we pass to nor->read_reg()/write_reg() is
> SPI_NOR_MAX_ID_LEN(6).
>
> I can provide a patch to always use nor->cmd_buf when reading/writing regs so
> you respin the series on top of it, if you feel the same.
>
> With nor->cmd_buf this function will be reduced to the following:
>
I will move the code introducing bounce buffer into separate patch at
the beginning of this series and switch over all read/write regs
functions to use bounce buffer instead of cmd_buf. cmd_buf will be dropped.
And then simplify this patch to spi_nor_spimem_xfer_reg() to you pointed
out below. Does that sound good?
> static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
> {
> if (!op || (op->data.nbytes && !nor->cmd_buf))
> return -EINVAL;
>
> return spi_mem_exec_op(nor->spimem, op);
> }
>
> spi_nor_exec_op() always received a NULL addr, let's get rid of it. We won't
> need buf anymore and you can retrieve the length from op->data.nbytes. Now that
> we trimmed the arguments, I think I would get rid of the
> spi_nor_data/nodata_op() wrappers and use spi_nor_spimem_xfer_reg() directly.
>
>> +
>> + if (!op || (len && !buf))
>> + return -EINVAL;
>> +
>> + if (op->addr.nbytes && addr)
>> + op->addr.val = *addr;
>> +
>> + op->data.nbytes = len;
>> +
>> + if (object_is_on_stack(buf) || !virt_addr_valid(buf))
>> + usebouncebuf = true;
>> + if (len && usebouncebuf) {
>> + if (len > nor->bouncebuf_size)
>> + return -ENOTSUPP;
>> +
>> + if (op->data.dir == SPI_MEM_DATA_IN) {
>> + op->data.buf.in = nor->bouncebuf;
>> + } else {
>> + op->data.buf.out = nor->bouncebuf;
>> + memcpy(nor->bouncebuf, buf, len);
>> + }
>> + } else {
>> + op->data.buf.out = buf;
>> + }
>> +
>> + ret = spi_mem_exec_op(nor->spimem, op);
>> + if (ret)
>> + return ret;
>> +
>> + if (usebouncebuf && len && op->data.dir == SPI_MEM_DATA_IN)
>> + memcpy(buf, nor->bouncebuf, len);
>> +
>> + return 0;
>> +}
>
> cut
>
>> +
>> +/**
>> + * spi_nor_spimem_xfer_data() - helper function to read/write data to
>> + * flash's memory region
>> + * @nor: pointer to 'struct spi_nor'
>> + * @op: pointer to 'struct spi_mem_op' template for transfer
>> + * @proto: protocol to be used for transfer
>> + *
>> + * Return: number of bytes transferred on success, -errno otherwise
>> + */
>> +static ssize_t spi_nor_spimem_xfer_data(struct spi_nor *nor,
>> + struct spi_mem_op *op,
>> + enum spi_nor_protocol proto)
>> +{
>> + bool usebouncebuf = false;
>
> declare bool at the end to avoid stack padding.
>
I prefer reverse xmas and hope compilers are intelligent enough to
reorder allocation to save padding :)
>> + void *rdbuf = NULL;
>> + const void *buf;
>
> you can get rid of rdbuf and buf if you pass buf as argument.
>
>> + int ret;
>> +
>> + /* get transfer protocols. */
>> + op->cmd.buswidth = spi_nor_get_protocol_inst_nbits(proto);
>> + op->addr.buswidth = spi_nor_get_protocol_addr_nbits(proto);
>> + op->data.buswidth = spi_nor_get_protocol_data_nbits(proto);
>> +
>> + if (op->data.dir == SPI_MEM_DATA_IN)
>> + buf = op->data.buf.in;
>> + else
>> + buf = op->data.buf.out;
>> +
>> + if (object_is_on_stack(buf) || !virt_addr_valid(buf))
>> + usebouncebuf = true;
>> +
>> + if (usebouncebuf) {
>> + if (op->data.nbytes > nor->bouncebuf_size)
>> + op->data.nbytes = nor->bouncebuf_size;
>> +
>> + if (op->data.dir == SPI_MEM_DATA_IN) {
>> + rdbuf = op->data.buf.in;
>> + op->data.buf.in = nor->bouncebuf;
>> + } else {
>> + op->data.buf.out = nor->bouncebuf;
>> + memcpy(nor->bouncebuf, buf,
>> + op->data.nbytes);
>> + }
>> + }
>> +
>> + ret = spi_mem_adjust_op_size(nor->spimem, op);
>> + if (ret)
>> + return ret;
>> +
>> + ret = spi_mem_exec_op(nor->spimem, op);
>> + if (ret)
>> + return ret;
>> +
>> + if (usebouncebuf && op->data.dir == SPI_MEM_DATA_IN)
>> + memcpy(rdbuf, nor->bouncebuf, op->data.nbytes);
>> +
>> + return op->data.nbytes;
>> +}
>> +
>> +/**
>> + * spi_nor_spimem_read_data() - read data from flash's memory region via
>> + * spi-mem
>> + * @nor: pointer to 'struct spi_nor'
>> + * @ofs: offset to read from
>> + * @len: number of bytes to read
>> + * @buf: pointer to dst buffer
>> + *
>> + * Return: number of bytes read successfully, -errno otherwise
>> + */
>> +static ssize_t spi_nor_spimem_read_data(struct spi_nor *nor, loff_t ofs,
>
> s/ofs/from? both flash and buf may have offsets, "from" better indicates that
> the offset is associated with the flash.
OK.
>
>> + size_t len, u8 *buf)
>> +{
>> + struct spi_mem_op op =
>> + SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 1),
>> + SPI_MEM_OP_ADDR(nor->addr_width, ofs, 1),
>> + SPI_MEM_OP_DUMMY(nor->read_dummy, 1),
>> + SPI_MEM_OP_DATA_IN(len, buf, 1));
>> +
>> + op.dummy.buswidth = spi_nor_get_protocol_addr_nbits(nor->read_proto);
>> +
>> + /* convert the dummy cycles to the number of bytes */
>> + op.dummy.nbytes = (nor->read_dummy * op.dummy.buswidth) / 8;
>> +
>> + return spi_nor_spimem_xfer_data(nor, &op, nor->read_proto);
>
> stop passing nor->read_proto and do all buswidth initialization here. This way
> we'll keep the inits all gathered together, and will have the xfer() that will
> do just the transfer (with bouncebuffer if needed). Function that does a single
> thing.
>
Ok, my idea was to factor out all common code b/w
spi_nor_spimem_read_data() and spi_nor_spimem_write_data() in
spi_nor_spimem_xfer_data(). But, I am fine with your idea.
>> +}
>
> cut
>
>> @@ -459,7 +749,6 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor)
>> struct spi_nor_erase_map *map = &nor->erase_map;
>> struct spi_nor_erase_type *erase;
>> int i;
>> -
>
> keep the blank line
>
Will drop
> cut
>
>> @@ -1406,7 +1807,18 @@ static int write_sr_cr(struct spi_nor *nor, u8 *sr_cr)
>>
>> write_enable(nor);
>>
>> - ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
>> + if (nor->spimem) {
>> + struct spi_mem_op op =
>> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 1),
>> + SPI_MEM_OP_NO_ADDR,
>> + SPI_MEM_OP_NO_DUMMY,
>> + SPI_MEM_OP_DATA_OUT(0, NULL, 1));
>
> nbytes is 2.
>
Will update when dropping spi_nor_data_op()
>> +
>> + ret = spi_nor_data_op(nor, &op, sr_cr, 2);
>> + } else {
>> + ret = nor->write_reg(nor, SPINOR_OP_WRSR, sr_cr, 2);
>> + }
>
> cut
>
>> @@ -1626,8 +2068,7 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
>> return ret;
>> }
>>
>> - /* Read back and check it. */
>
> don't drop the comment
Agreed
>
>> - ret = nor->read_reg(nor, SPINOR_OP_RDSR2, &sr2, 1);
>> + ret = spi_nor_read_sr2(nor, &sr2);
>> if (!(ret > 0 && (sr2 & SR2_QUAD_EN_BIT7))) {
>> dev_err(nor->dev, "SR2 Quad bit not set\n");
>> return -EINVAL;
>> @@ -2180,7 +2621,18 @@ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
>> u8 id[SPI_NOR_MAX_ID_LEN];
>> const struct flash_info *info;
>>
>> - tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
>> + if (nor->spimem) {
>> + struct spi_mem_op op =
>> + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 1),
>> + SPI_MEM_OP_NO_ADDR,
>> + SPI_MEM_OP_NO_DUMMY,
>> + SPI_MEM_OP_DATA_IN(0, NULL, 1));
>
> nbytes is SPI_NOR_MAX_ID_LEN and not 1.
>
Will fix along with dropping spi_nor_data_op()
> Cheers,
> ta
>
Regards
Vignesh
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c
2019-07-30 18:04 ` Vignesh Raghavendra
@ 2019-07-31 6:19 ` Tudor.Ambarus
0 siblings, 0 replies; 12+ messages in thread
From: Tudor.Ambarus @ 2019-07-31 6:19 UTC (permalink / raw)
To: vigneshr, miquel.raynal, richard, marek.vasut
Cc: yogeshnarayan.gaur, linux-mtd, linux-kernel, bbrezillon
On 07/30/2019 09:04 PM, Vignesh Raghavendra wrote:
>>> + */
>>> +static int spi_nor_exec_op(struct spi_nor *nor, struct spi_mem_op *op,
>>> + u64 *addr, void *buf, size_t len)
>>> +{
>>> + int ret;
>>> + bool usebouncebuf = false;
>> I don't think we need a bounce buffer for regs. What is the maximum size that we
>> read/write regs, SPI_NOR_MAX_CMD_SIZE(8)?
>>
>> In spi-nor.c the maximum length that we pass to nor->read_reg()/write_reg() is
>> SPI_NOR_MAX_ID_LEN(6).
>>
>> I can provide a patch to always use nor->cmd_buf when reading/writing regs so
>> you respin the series on top of it, if you feel the same.
>>
>
>> With nor->cmd_buf this function will be reduced to the following:
>>
> I will move the code introducing bounce buffer into separate patch at
> the beginning of this series and switch over all read/write regs
> functions to use bounce buffer instead of cmd_buf. cmd_buf will be dropped.
> And then simplify this patch to spi_nor_spimem_xfer_reg() to you pointed
> out below. Does that sound good?
>
Please do. Probably we can get rid of spi_nor_spimem_xfer_reg entirely and use
spi_mem_exec_op() directly when interacting with registers. I'll wait for your v3.
Cheers,
ta
>> static int spi_nor_spimem_xfer_reg(struct spi_nor *nor, struct spi_mem_op *op)
>> {
>> if (!op || (op->data.nbytes && !nor->cmd_buf))
>> return -EINVAL;
>>
>> return spi_mem_exec_op(nor->spimem, op);
>> }
>>
>> spi_nor_exec_op() always received a NULL addr, let's get rid of it. We won't
>> need buf anymore and you can retrieve the length from op->data.nbytes. Now that
>> we trimmed the arguments, I think I would get rid of the
>> spi_nor_data/nodata_op() wrappers and use spi_nor_spimem_xfer_reg() directly.
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-07-31 6:24 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-20 8:00 [PATCH v2 0/2] ] Merge m25p80 into spi-nor Vignesh Raghavendra
2019-07-20 8:00 ` [PATCH v2 1/2] mtd: spi-nor: Move m25p80 code in spi-nor.c Vignesh Raghavendra
2019-07-25 11:19 ` Tudor.Ambarus
2019-07-25 11:44 ` Tudor.Ambarus
2019-07-25 12:37 ` Boris Brezillon
2019-07-25 13:17 ` Tudor.Ambarus
2019-07-25 13:35 ` Tudor.Ambarus
2019-07-25 14:00 ` Boris Brezillon
2019-07-25 14:36 ` Tudor.Ambarus
2019-07-30 18:04 ` Vignesh Raghavendra
2019-07-31 6:19 ` Tudor.Ambarus
2019-07-20 8:00 ` [PATCH v2 2/2] mtd: spi-nor: Rework hwcaps selection for the spi-mem case Vignesh Raghavendra
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