From: Rob Herring <robh@kernel.org> To: Piotr Sroka <piotrs@cadence.com> Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org, Boris Brezillon <bbrezillon@kernel.org>, Richard Weinberger <richard@nod.at>, linux-kernel@vger.kernel.org, Marek Vasut <marek.vasut@gmail.com>, linux-mtd@lists.infradead.org, BrianNorris <computersforpeace@gmail.com>, David Woodhouse <dwmw2@infradead.org>, Kazuhiro Kasai <kasai.kazuhiro@socionext.com> Subject: Re: [v5 2/2] dt-bindings: mtd: Add Cadence NAND controller driver Date: Fri, 16 Aug 2019 16:31:10 -0500 Message-ID: <20190816213110.GA31192@bogus> (raw) In-Reply-To: <20190725145955.13951-1-piotrs@cadence.com> On Thu, Jul 25, 2019 at 03:59:55PM +0100, Piotr Sroka wrote: > Document the bindings used by Cadence NAND controller driver > > Signed-off-by: Piotr Sroka <piotrs@cadence.com> > --- > Changes for v5: > - replace "_" by "-" in all properties > - change compatible name from cdns,hpnfc to cdns,hp-nfc > Changes for v4: > - add commit message > Changes for v3: > - add unit suffix for board_delay > - move child description to proper place > - remove prefix cadence_ for reg and sdma fields > Changes for v2: > - remove chip dependends parameters from dts bindings > - add names for register ranges in dts bindings > - add generic bindings to describe NAND chip representation > --- > .../bindings/mtd/cadence-nand-controller.txt | 50 ++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt > > diff --git a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt > new file mode 100644 > index 000000000000..423547a3f993 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt > @@ -0,0 +1,50 @@ > +* Cadence NAND controller > + > +Required properties: > + - compatible : "cdns,hp-nfc" > + - reg : Contains two entries, each of which is a tuple consisting of a > + physical address and length. The first entry is the address and > + length of the controller register set. The second entry is the > + address and length of the Slave DMA data port. > + - reg-names: should contain "reg" and "sdma" > + - interrupts : The interrupt number. > + - clocks: phandle of the controller core clock (nf_clk). > + > +Optional properties: > + - dmas: shall reference DMA channel associated to the NAND controller > + - cdns,board-delay-ps : Estimated Board delay. The value includes the total > + round trip delay for the signals and is used for deciding on values > + associated with data read capture. The example formula for SDR mode is > + the following: > + board delay = RE#PAD delay + PCB trace to device + PCB trace from device > + + DQ PAD delay > + > +Child nodes represent the available NAND chips. > + > +Required properties of NAND chips: > + - reg: shall contain the native Chip Select ids from 0 to max supported by > + the cadence nand flash controller > + > + > +See Documentation/devicetree/bindings/mtd/nand.txt for more details on > +generic bindings. > + > +Example: > + > +nand_controller: nand-controller @60000000 { space ^ > + compatible = "cdns,hp-nfc"; > + reg = <0x60000000 0x10000>, <0x80000000 0x10000>; > + reg-names = "reg", "sdma"; > + clocks = <&nf_clk>; > + cdns,board-delay-ps = <4830>; > + interrupts = <2 0>; You need #address-cells and #size-cells here. With those fixes, Reviewed-by: Rob Herring <robh@kernel.org> > + nand@0 { > + reg = <0>; > + label = "nand-1"; > + }; > + nand@1 { > + reg = <1>; > + label = "nand-2"; > + }; > + > +}; > -- > 2.15.0 > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply index Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-07-25 14:58 [v5 0/2] mtd: nand: " Piotr Sroka 2019-07-25 14:59 ` [v5 2/2] dt-bindings: mtd: " Piotr Sroka 2019-08-16 21:31 ` Rob Herring [this message] 2019-08-30 9:46 ` Miquel Raynal 2019-09-11 15:04 ` Piotr Sroka 2019-09-13 12:49 ` Miquel Raynal 2019-09-13 14:41 ` Piotr Sroka 2019-07-25 15:00 ` [v5 1/2] mtd: nand: Add new Cadence NAND driver to MTD subsystem Piotr Sroka 2019-07-25 15:11 ` Dmitry Osipenko 2019-08-24 10:49 ` Miquel Raynal 2019-08-26 15:09 ` Dmitry Osipenko 2019-08-30 9:46 ` Miquel Raynal 2019-09-11 9:43 ` Piotr Sroka 2019-09-11 12:29 ` Miquel Raynal
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