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* [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
@ 2019-08-31  5:50 Jethro Beekman
  2019-08-31 13:36 ` Mika Westerberg
  0 siblings, 1 reply; 5+ messages in thread
From: Jethro Beekman @ 2019-08-31  5:50 UTC (permalink / raw)
  To: Marek Vasut, Tudor Ambarus, David Woodhouse, Brian Norris,
	Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Allison Randal, Thomas Gleixner, Jethro Beekman, Enrico Weigelt,
	Mika Westerberg, linux-mtd, linux-kernel
  Cc: Jethro Beekman

(apologies, resending without S/MIME signature)

Now that SPI flash controllers without a software sequencer are
supported, it's trivial to add support for CNL and its PCI ID.

Signed-off-by: Jethro Beekman <jethro@fortanix.com>
---
   drivers/mtd/spi-nor/intel-spi-pci.c     |  5 +++++
   drivers/mtd/spi-nor/intel-spi.c         | 11 +++++++++++
   include/linux/platform_data/intel-spi.h |  1 +
   3 files changed, 17 insertions(+)

diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c 
b/drivers/mtd/spi-nor/intel-spi-pci.c
index b83c4ab6..195a09d 100644
--- a/drivers/mtd/spi-nor/intel-spi-pci.c
+++ b/drivers/mtd/spi-nor/intel-spi-pci.c
@@ -20,6 +20,10 @@ static const struct intel_spi_boardinfo bxt_info = {
   	.type = INTEL_SPI_BXT,
   };
   +static const struct intel_spi_boardinfo cnl_info = {
+	.type = INTEL_SPI_CNL,
+};
+
   static int intel_spi_pci_probe(struct pci_dev *pdev,
   			       const struct pci_device_id *id)
   {
@@ -67,6 +71,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = {
   	{ PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info },
   	{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },
   	{ PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0xa324), (unsigned long)&cnl_info },
   	{ },
   };
   MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids);
diff --git a/drivers/mtd/spi-nor/intel-spi.c 
b/drivers/mtd/spi-nor/intel-spi.c
index 195cdca..91b7851 100644
--- a/drivers/mtd/spi-nor/intel-spi.c
+++ b/drivers/mtd/spi-nor/intel-spi.c
@@ -108,6 +108,10 @@
   #define BXT_FREG_NUM			12
   #define BXT_PR_NUM			6
   +#define CNL_PR				0x84
+#define CNL_FREG_NUM			6
+#define CNL_PR_NUM			5
+
   #define LVSCC				0xc4
   #define UVSCC				0xc8
   #define ERASE_OPCODE_SHIFT		8
@@ -344,6 +348,13 @@ static int intel_spi_init(struct intel_spi *ispi)
   		ispi->erase_64k = true;
   		break;
   +	case INTEL_SPI_CNL:
+		ispi->sregs = NULL;
+		ispi->pregs = ispi->base + CNL_PR;
+		ispi->nregions = CNL_FREG_NUM;
+		ispi->pr_num = CNL_PR_NUM;
+		break;
+
   	default:
   		return -EINVAL;
   	}
diff --git a/include/linux/platform_data/intel-spi.h 
b/include/linux/platform_data/intel-spi.h
index ebb4f33..7f53a5c 100644
--- a/include/linux/platform_data/intel-spi.h
+++ b/include/linux/platform_data/intel-spi.h
@@ -13,6 +13,7 @@ enum intel_spi_type {
   	INTEL_SPI_BYT = 1,
   	INTEL_SPI_LPT,
   	INTEL_SPI_BXT,
+	INTEL_SPI_CNL,
   };
    /**
-- 
2.7.4


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^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
  2019-08-31  5:50 [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash Jethro Beekman
@ 2019-08-31 13:36 ` Mika Westerberg
  2019-08-31 15:29   ` Jethro Beekman
  0 siblings, 1 reply; 5+ messages in thread
From: Mika Westerberg @ 2019-08-31 13:36 UTC (permalink / raw)
  To: Jethro Beekman
  Cc: Enrico Weigelt, Vignesh Raghavendra, Tudor Ambarus,
	Richard Weinberger, linux-kernel, Marek Vasut, linux-mtd,
	Miquel Raynal, Thomas Gleixner, Brian Norris, David Woodhouse,
	Allison Randal

Hi Jethro,

On Sat, Aug 31, 2019 at 05:50:34AM +0000, Jethro Beekman wrote:
> (apologies, resending without S/MIME signature)
> 
> Now that SPI flash controllers without a software sequencer are
> supported, it's trivial to add support for CNL and its PCI ID.
> 
> Signed-off-by: Jethro Beekman <jethro@fortanix.com>
> ---
>    drivers/mtd/spi-nor/intel-spi-pci.c     |  5 +++++
>    drivers/mtd/spi-nor/intel-spi.c         | 11 +++++++++++
>    include/linux/platform_data/intel-spi.h |  1 +
>    3 files changed, 17 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c 
> b/drivers/mtd/spi-nor/intel-spi-pci.c
> index b83c4ab6..195a09d 100644
> --- a/drivers/mtd/spi-nor/intel-spi-pci.c
> +++ b/drivers/mtd/spi-nor/intel-spi-pci.c
> @@ -20,6 +20,10 @@ static const struct intel_spi_boardinfo bxt_info = {
>    	.type = INTEL_SPI_BXT,
>    };
>    +static const struct intel_spi_boardinfo cnl_info = {

Looks like some white space damage. There are couple of similar below as
well.

> +	.type = INTEL_SPI_CNL,
> +};
> +
>    static int intel_spi_pci_probe(struct pci_dev *pdev,
>    			       const struct pci_device_id *id)
>    {
> @@ -67,6 +71,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = {
>    	{ PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info },
>    	{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },
>    	{ PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },
> +	{ PCI_VDEVICE(INTEL, 0xa324), (unsigned long)&cnl_info },
>    	{ },
>    };
>    MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids);
> diff --git a/drivers/mtd/spi-nor/intel-spi.c 
> b/drivers/mtd/spi-nor/intel-spi.c
> index 195cdca..91b7851 100644
> --- a/drivers/mtd/spi-nor/intel-spi.c
> +++ b/drivers/mtd/spi-nor/intel-spi.c
> @@ -108,6 +108,10 @@
>    #define BXT_FREG_NUM			12
>    #define BXT_PR_NUM			6
>    +#define CNL_PR				0x84

Here.

> +#define CNL_FREG_NUM			6
> +#define CNL_PR_NUM			5
> +
>    #define LVSCC				0xc4
>    #define UVSCC				0xc8
>    #define ERASE_OPCODE_SHIFT		8
> @@ -344,6 +348,13 @@ static int intel_spi_init(struct intel_spi *ispi)
>    		ispi->erase_64k = true;
>    		break;
>    +	case INTEL_SPI_CNL:

And here.

> +		ispi->sregs = NULL;
> +		ispi->pregs = ispi->base + CNL_PR;
> +		ispi->nregions = CNL_FREG_NUM;
> +		ispi->pr_num = CNL_PR_NUM;

Does CNL really have a different number of PR and FR regions than the
previous generations?

> +		break;
> +
>    	default:
>    		return -EINVAL;
>    	}
> diff --git a/include/linux/platform_data/intel-spi.h 
> b/include/linux/platform_data/intel-spi.h
> index ebb4f33..7f53a5c 100644
> --- a/include/linux/platform_data/intel-spi.h
> +++ b/include/linux/platform_data/intel-spi.h
> @@ -13,6 +13,7 @@ enum intel_spi_type {
>    	INTEL_SPI_BYT = 1,
>    	INTEL_SPI_LPT,
>    	INTEL_SPI_BXT,
> +	INTEL_SPI_CNL,
>    };
>     /**
> -- 
> 2.7.4
> 
> 

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Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
  2019-08-31 13:36 ` Mika Westerberg
@ 2019-08-31 15:29   ` Jethro Beekman
  2019-08-31 15:44     ` Mika Westerberg
  0 siblings, 1 reply; 5+ messages in thread
From: Jethro Beekman @ 2019-08-31 15:29 UTC (permalink / raw)
  To: Mika Westerberg
  Cc: Enrico Weigelt, Vignesh Raghavendra, Tudor Ambarus,
	Richard Weinberger, linux-kernel, Marek Vasut, linux-mtd,
	Miquel Raynal, Thomas Gleixner, Brian Norris, David Woodhouse,
	Allison Randal


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On 2019-08-31 06:36, Mika Westerberg wrote:
> Looks like some white space damage. There are couple of similar below as
> well.

Oops. I will fix this in a v2 or resend later.

>> +		ispi->sregs = NULL;
>> +		ispi->pregs = ispi->base + CNL_PR;
>> +		ispi->nregions = CNL_FREG_NUM;
>> +		ispi->pr_num = CNL_PR_NUM;
> 
> Does CNL really have a different number of PR and FR regions than the
> previous generations?

I'm using this as a reference: 
https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf 
. If you have more accurate information, please let me know.

--
Jethro Beekman | Fortanix


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______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
  2019-08-31 15:29   ` Jethro Beekman
@ 2019-08-31 15:44     ` Mika Westerberg
  0 siblings, 0 replies; 5+ messages in thread
From: Mika Westerberg @ 2019-08-31 15:44 UTC (permalink / raw)
  To: Jethro Beekman
  Cc: Enrico Weigelt, Vignesh Raghavendra, Tudor Ambarus,
	Richard Weinberger, linux-kernel, Marek Vasut, linux-mtd,
	Miquel Raynal, Thomas Gleixner, Brian Norris, David Woodhouse,
	Allison Randal

On Sat, Aug 31, 2019 at 03:29:21PM +0000, Jethro Beekman wrote:
> > > +		ispi->sregs = NULL;
> > > +		ispi->pregs = ispi->base + CNL_PR;
> > > +		ispi->nregions = CNL_FREG_NUM;
> > > +		ispi->pr_num = CNL_PR_NUM;
> > 
> > Does CNL really have a different number of PR and FR regions than the
> > previous generations?
> 
> I'm using this as a reference: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf
> . If you have more accurate information, please let me know.

No looks correct to me. I think it is a good idea to mention this in the
changelog, though.

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
@ 2019-08-31  5:50 Jethro Beekman
  0 siblings, 0 replies; 5+ messages in thread
From: Jethro Beekman @ 2019-08-31  5:50 UTC (permalink / raw)
  To: Marek Vasut, Tudor Ambarus, David Woodhouse, Brian Norris,
	Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
	Allison Randal, Thomas Gleixner, Jethro Beekman, Enrico Weigelt,
	Mika Westerberg, linux-mtd, linux-kernel
  Cc: Jethro Beekman


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Now that SPI flash controllers without a software sequencer are
supported, it's trivial to add support for CNL and its PCI ID.

Signed-off-by: Jethro Beekman <jethro@fortanix.com>
---
  drivers/mtd/spi-nor/intel-spi-pci.c     |  5 +++++
  drivers/mtd/spi-nor/intel-spi.c         | 11 +++++++++++
  include/linux/platform_data/intel-spi.h |  1 +
  3 files changed, 17 insertions(+)

diff --git a/drivers/mtd/spi-nor/intel-spi-pci.c 
b/drivers/mtd/spi-nor/intel-spi-pci.c
index b83c4ab6..195a09d 100644
--- a/drivers/mtd/spi-nor/intel-spi-pci.c
+++ b/drivers/mtd/spi-nor/intel-spi-pci.c
@@ -20,6 +20,10 @@ static const struct intel_spi_boardinfo bxt_info = {
  	.type = INTEL_SPI_BXT,
  };
  +static const struct intel_spi_boardinfo cnl_info = {
+	.type = INTEL_SPI_CNL,
+};
+
  static int intel_spi_pci_probe(struct pci_dev *pdev,
  			       const struct pci_device_id *id)
  {
@@ -67,6 +71,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = {
  	{ PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info },
  	{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },
  	{ PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0xa324), (unsigned long)&cnl_info },
  	{ },
  };
  MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids);
diff --git a/drivers/mtd/spi-nor/intel-spi.c 
b/drivers/mtd/spi-nor/intel-spi.c
index 195cdca..91b7851 100644
--- a/drivers/mtd/spi-nor/intel-spi.c
+++ b/drivers/mtd/spi-nor/intel-spi.c
@@ -108,6 +108,10 @@
  #define BXT_FREG_NUM			12
  #define BXT_PR_NUM			6
  +#define CNL_PR				0x84
+#define CNL_FREG_NUM			6
+#define CNL_PR_NUM			5
+
  #define LVSCC				0xc4
  #define UVSCC				0xc8
  #define ERASE_OPCODE_SHIFT		8
@@ -344,6 +348,13 @@ static int intel_spi_init(struct intel_spi *ispi)
  		ispi->erase_64k = true;
  		break;
  +	case INTEL_SPI_CNL:
+		ispi->sregs = NULL;
+		ispi->pregs = ispi->base + CNL_PR;
+		ispi->nregions = CNL_FREG_NUM;
+		ispi->pr_num = CNL_PR_NUM;
+		break;
+
  	default:
  		return -EINVAL;
  	}
diff --git a/include/linux/platform_data/intel-spi.h 
b/include/linux/platform_data/intel-spi.h
index ebb4f33..7f53a5c 100644
--- a/include/linux/platform_data/intel-spi.h
+++ b/include/linux/platform_data/intel-spi.h
@@ -13,6 +13,7 @@ enum intel_spi_type {
  	INTEL_SPI_BYT = 1,
  	INTEL_SPI_LPT,
  	INTEL_SPI_BXT,
+	INTEL_SPI_CNL,
  };
   /**
-- 
2.7.4



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______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-08-31 15:44 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-31  5:50 [PATCH 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash Jethro Beekman
2019-08-31 13:36 ` Mika Westerberg
2019-08-31 15:29   ` Jethro Beekman
2019-08-31 15:44     ` Mika Westerberg
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2019-08-31  5:50 Jethro Beekman

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