From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Jethro Beekman <jethro@fortanix.com>
Cc: Enrico Weigelt <info@metux.net>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <tudor.ambarus@microchip.com>,
Richard Weinberger <richard@nod.at>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Thomas Gleixner <tglx@linutronix.de>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
Allison Randal <allison@lohutok.net>
Subject: Re: [PATCH v2 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
Date: Thu, 5 Sep 2019 07:55:33 +0300 [thread overview]
Message-ID: <20190905045533.GS18521@lahna.fi.intel.com> (raw)
In-Reply-To: <d62dec18-fed4-7ac5-35c8-25f1be2201a9@fortanix.com>
On Wed, Sep 04, 2019 at 01:15:24AM +0000, Jethro Beekman wrote:
> Now that SPI flash controllers without a software sequencer are
> supported, it's trivial to add support for CNL and its PCI ID.
>
> Values from https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf
>
> Signed-off-by: Jethro Beekman <jethro@fortanix.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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next prev parent reply other threads:[~2019-09-05 5:00 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-04 1:15 [PATCH v2 2/2] mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash Jethro Beekman
2019-09-05 4:55 ` Mika Westerberg [this message]
2019-10-23 21:22 ` Tudor.Ambarus
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