From: <Tudor.Ambarus@microchip.com>
To: <sagar.kadam@sifive.com>, <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org, Tudor.Ambarus@microchip.com
Subject: [PATCH v10 2/2] mtd: spi-nor: Set default Quad Enable method for ISSI flashes
Date: Tue, 22 Oct 2019 17:22:19 +0000 [thread overview]
Message-ID: <20191022172210.19865-2-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20191022172210.19865-1-tudor.ambarus@microchip.com>
From: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Set the default Quad Enable method for ISSI flashes. Used for
ISSI flashes (IS25WP256D-JMLE) that do not support SFDP tables
and can not determine the Quad Enable method by parsing BFPT.
Based on code originally written by Wesley Terpstra <wesley@sifive.com>
and/or Palmer Dabbelt <palmer@sifive.com>
https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
[tudor.ambarus@microchip.com:
- rebase, split and adapt for v5.4-rc4,
- use PMC CFI ID for ISSI. According to JEP106BA, "Programmable Micro Corp"
changed its name to Integrated Silicon Solution (ISSI)]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
Sagar, this is needed just for the ISSI flashes that can't retrieve the
Quad Enable method from BFPT. It deserves a separate patch. Let me know
if you are ok with how I reorganized the patches.
drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 3fc1eb20dca5..122e5bedf4f2 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -4385,6 +4385,11 @@ static int spi_nor_setup(struct spi_nor *nor,
return nor->params.setup(nor, hwcaps);
}
+static void issi_set_default_init(struct spi_nor *nor)
+{
+ nor->params.quad_enable = macronix_quad_enable;
+}
+
static void macronix_set_default_init(struct spi_nor *nor)
{
nor->params.quad_enable = macronix_quad_enable;
@@ -4412,6 +4417,10 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor)
{
/* Init flash parameters based on MFR */
switch (JEDEC_MFR(nor->info)) {
+ case SNOR_MFR_ISSI:
+ issi_set_default_init(nor);
+ break;
+
case SNOR_MFR_MACRONIX:
macronix_set_default_init(nor);
break;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index fc0b4b19c900..b4636ff707ad 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -22,6 +22,7 @@
#define SNOR_MFR_INTEL CFI_MFR_INTEL
#define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */
#define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */
+#define SNOR_MFR_ISSI CFI_MFR_PMC
#define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX
#define SNOR_MFR_SPANSION CFI_MFR_AMD
#define SNOR_MFR_SST CFI_MFR_SST
--
2.9.5
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next prev parent reply other threads:[~2019-10-22 17:22 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-18 16:01 [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 1/2] mtd: spi-nor: add support for is25wp256 Sagar Shrikant Kadam
2019-09-18 16:01 ` [PATCH v9 2/2] mtd: spi-nor: fix nor->addr_width " Sagar Shrikant Kadam
2019-09-30 13:34 ` [PATCH v9 0/2] mtd: spi-nor: add support for is25wp256 spi-nor flash Sagar Kadam
2019-10-22 17:22 ` [PATCH v10 1/2] mtd: spi-nor: Add support for is25wp256 Tudor.Ambarus
2019-10-22 17:22 ` Tudor.Ambarus [this message]
2019-10-30 19:42 ` [PATCH v10 2/2] mtd: spi-nor: Set default Quad Enable method for ISSI flashes Sagar Kadam
2019-11-07 9:05 ` Vignesh Raghavendra
2019-11-11 19:38 ` Tudor.Ambarus
2019-11-07 9:03 ` [PATCH v10 1/2] mtd: spi-nor: Add support for is25wp256 Vignesh Raghavendra
2019-11-11 19:36 ` Tudor.Ambarus
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