From: <Tudor.Ambarus@microchip.com>
To: <bbrezillon@kernel.org>, <vigneshr@ti.com>
Cc: richard@nod.at, Tudor.Ambarus@microchip.com,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, miquel.raynal@bootlin.com
Subject: [PATCH v2 20/25] mtd: spi-nor: Move Catalyst bits out of core.c
Date: Fri, 13 Mar 2020 19:42:49 +0000 [thread overview]
Message-ID: <20200313194130.342251-21-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20200313194130.342251-1-tudor.ambarus@microchip.com>
From: Boris Brezillon <bbrezillon@kernel.org>
Create a SPI NOR manufacturer driver for Catalyst chips, and move the
Catalyst definitions outside of core.c.
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/catalyst.c | 29 +++++++++++++++++++++++++++++
drivers/mtd/spi-nor/core.c | 8 +-------
drivers/mtd/spi-nor/core.h | 1 +
4 files changed, 32 insertions(+), 7 deletions(-)
create mode 100644 drivers/mtd/spi-nor/catalyst.c
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
index 33b6f834a14f..cd8d95b727c9 100644
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -2,6 +2,7 @@
spi-nor-objs := core.o sfdp.o
spi-nor-objs += atmel.o
+spi-nor-objs += catalyst.o
spi-nor-objs += eon.o
spi-nor-objs += esmt.o
spi-nor-objs += everspin.o
diff --git a/drivers/mtd/spi-nor/catalyst.c b/drivers/mtd/spi-nor/catalyst.c
new file mode 100644
index 000000000000..011b83e99e95
--- /dev/null
+++ b/drivers/mtd/spi-nor/catalyst.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2005, Intec Automation Inc.
+ * Copyright (C) 2014, Freescale Semiconductor, Inc.
+ */
+
+#include <linux/mtd/spi-nor.h>
+
+#include "core.h"
+
+static const struct flash_info catalyst_parts[] = {
+ /* Catalyst / On Semiconductor -- non-JEDEC */
+ { "cat25c11", CAT25_INFO(16, 8, 16, 1,
+ SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "cat25c03", CAT25_INFO(32, 8, 16, 2,
+ SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "cat25c09", CAT25_INFO(128, 8, 32, 2,
+ SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "cat25c17", CAT25_INFO(256, 8, 32, 2,
+ SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+ { "cat25128", CAT25_INFO(2048, 8, 64, 2,
+ SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
+};
+
+const struct spi_nor_manufacturer spi_nor_catalyst = {
+ .name = "catalyst",
+ .parts = catalyst_parts,
+ .nparts = ARRAY_SIZE(catalyst_parts),
+};
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index c89d3000c46e..99da7d8e9097 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -1963,13 +1963,6 @@ int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor)
* old entries may be missing 4K flag.
*/
static const struct flash_info spi_nor_ids[] = {
- /* Catalyst / On Semiconductor -- non-JEDEC */
- { "cat25c11", CAT25_INFO( 16, 8, 16, 1, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
- { "cat25c03", CAT25_INFO( 32, 8, 16, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
- { "cat25c09", CAT25_INFO( 128, 8, 32, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
- { "cat25c17", CAT25_INFO( 256, 8, 32, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
- { "cat25128", CAT25_INFO(2048, 8, 64, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
-
/* Xilinx S3AN Internal Flash */
{ "3S50AN", S3AN_INFO(0x1f2200, 64, 264) },
{ "3S200AN", S3AN_INFO(0x1f2400, 256, 264) },
@@ -1985,6 +1978,7 @@ static const struct flash_info spi_nor_ids[] = {
static const struct spi_nor_manufacturer *manufacturers[] = {
&spi_nor_atmel,
+ &spi_nor_catalyst,
&spi_nor_eon,
&spi_nor_esmt,
&spi_nor_everspin,
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index fa65fbb6e0d2..aaa2a460a159 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -168,6 +168,7 @@ struct spi_nor_manufacturer {
/* Manufacturer drivers. */
extern const struct spi_nor_manufacturer spi_nor_atmel;
+extern const struct spi_nor_manufacturer spi_nor_catalyst;
extern const struct spi_nor_manufacturer spi_nor_eon;
extern const struct spi_nor_manufacturer spi_nor_esmt;
extern const struct spi_nor_manufacturer spi_nor_everspin;
--
2.23.0
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-03-13 19:56 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-13 19:42 [PATCH v2 00/25] mtd: spi-nor: Move manufacturer/SFDP code out Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 01/25] mtd: spi-nor: Stop prefixing generic functions with a manufacturer name Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 02/25] mtd: spi-nor: Emphasise which is the generic set_4byte_addr_mode() method Tudor.Ambarus
2020-03-16 5:29 ` Vignesh Raghavendra
2020-03-13 19:42 ` [PATCH v2 03/25] mtd: spi-nor: Prepare core / manufacturer code split Tudor.Ambarus
2020-04-04 5:39 ` Guenter Roeck
2020-04-04 6:00 ` Guenter Roeck
2020-04-05 9:00 ` Boris Brezillon
2020-03-13 19:42 ` [PATCH v2 04/25] mtd: spi-nor: Move SFDP logic out of the core Tudor.Ambarus
2020-03-16 9:17 ` Vignesh Raghavendra
2020-03-13 19:42 ` [PATCH v2 05/25] mtd: spi-nor: Expose stuctures and functions to manufacturer drivers Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 07/25] mtd: spi-nor: Move Atmel bits out of core.c Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 06/25] mtd: spi-nor: Add the concept of SPI NOR manufacturer driver Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 08/25] mtd: spi-nor: Move Eon bits out of core.c Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 10/25] mtd: spi-nor: Move Everspin " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 09/25] mtd: spi-nor: Move ESMT " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 11/25] mtd: spi-nor: Move Fujitsu " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 13/25] mtd: spi-nor: Move Intel " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 12/25] mtd: spi-nor: Move GigaDevice " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 14/25] mtd: spi-nor: Move ISSI " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 15/25] mtd: spi-nor: Move Macronix " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 16/25] mtd: spi-nor: Move Micron/ST " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 17/25] mtd: spi-nor: Move Spansion " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 18/25] mtd: spi-nor: Move SST " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 19/25] mtd: spi-nor: Move Winbond " Tudor.Ambarus
2020-03-13 19:42 ` Tudor.Ambarus [this message]
2020-03-13 19:42 ` [PATCH v2 22/25] mtd: spi-nor: Move XMC " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 21/25] mtd: spi-nor: Move Xilinx " Tudor.Ambarus
2020-03-13 19:42 ` [PATCH v2 23/25] mtd: spi-nor: Get rid of the now empty spi_nor_ids[] table Tudor.Ambarus
2020-03-16 5:31 ` Vignesh Raghavendra
2020-03-13 19:42 ` [PATCH v2 24/25] mtd: spi-nor: Drop the MFR definitions Tudor.Ambarus
2020-03-16 9:29 ` Boris Brezillon
2020-03-13 19:42 ` [PATCH v2 25/25] mtd: spi-nor: Trim what is exposed in spi-nor.h Tudor.Ambarus
2020-03-16 9:47 ` [PATCH v2 00/25] mtd: spi-nor: Move manufacturer/SFDP code out Vignesh Raghavendra
2020-03-17 7:40 ` Tudor.Ambarus
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200313194130.342251-21-tudor.ambarus@microchip.com \
--to=tudor.ambarus@microchip.com \
--cc=bbrezillon@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-mtd@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=richard@nod.at \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).