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From: Pratyush Yadav <me@yadavpratyush.com>
To: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <tudor.ambarus@microchip.com>,
	Richard Weinberger <richard@nod.at>, Sekhar Nori <nsekhar@ti.com>,
	Nicolas Ferre <nicolas.ferre@microchip.com>,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	Ludovic Desroches <ludovic.desroches@microchip.com>,
	Mark Brown <broonie@kernel.org>,
	linux-mtd@lists.infradead.org,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-mediatek@lists.infradead.org,
	Mason Yang <masonccyang@mxic.com.tw>,
	Pratyush Yadav <p.yadav@ti.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 02/20] spi: spi-mem: allow specifying a command's extension
Date: Sat, 23 May 2020 02:00:02 +0530
Message-ID: <20200522203002.3bztaxrz7rxmbzgt@yadavpratyush.com> (raw)
In-Reply-To: <20200522173254.05316d47@collabora.com>

On 22/05/20 05:32PM, Boris Brezillon wrote:
> On Fri, 22 May 2020 15:42:43 +0530
> Pratyush Yadav <p.yadav@ti.com> wrote:
> 
> > In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
> > the "command extension". There can be 3 types of extensions in xSPI:
> > repeat, invert, and hex. When the extension type is "repeat", the same
> > opcode is sent twice. When it is "invert", the second byte is the
> > inverse of the opcode. When it is "hex" an additional opcode byte based
> > is sent with the command whose value can be anything.
> > 
> > So, make opcode a 16-bit value and add a 'nbytes', similar to how
> > multiple address widths are handled.
> 
> A slightly different version of patch 5 should go before this patch,
> otherwise your series is not bisectable. By slightly different, I mean
> that you should only write one byte, but put this byte in a temporary
> var. Or maybe you can squash patch 5 in this one and mention why you do
> so in your commit message.

How about the patch below before this patch? The supports_op() will 
reject multi-byte opcodes anyway, so we only care about single-byte 
opcodes for now. Multi-byte opcodes can be patched and tested later. 
This avoids squashing changes in this patch and having the changes split 
over two patches; one before and one after.

-- 8< --
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index 69491f3a515d..4e4292f0ee1d 100644
--- a/drivers/spi/spi-mxic.c
+++ b/drivers/spi/spi-mxic.c
@@ -356,6 +356,7 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
 	int nio = 1, i, ret;
 	u32 ss_ctrl;
 	u8 addr[8];
+	u8 opcode = op->cmd.opcode & 0xff;
 
 	ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
 	if (ret)
@@ -393,7 +394,7 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
 	writel(readl(mxic->regs + HC_CFG) | HC_CFG_MAN_CS_ASSERT,
 	       mxic->regs + HC_CFG);
 
-	ret = mxic_spi_data_xfer(mxic, &op->cmd.opcode, NULL, 1);
+	ret = mxic_spi_data_xfer(mxic, &opcode, NULL, 1);
 	if (ret)
 		goto out;
 
-- 
Regards,
Pratyush Yadav

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Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-22 10:12 [PATCH v7 00/20] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 01/20] spi: spi-mem: allow specifying whether an op is DTR or not Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 02/20] spi: spi-mem: allow specifying a command's extension Pratyush Yadav
2020-05-22 15:32   ` Boris Brezillon
2020-05-22 20:30     ` Pratyush Yadav [this message]
2020-05-22 10:12 ` [PATCH v7 03/20] spi: atmel-quadspi: reject DTR ops Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 04/20] spi: spi-mtk-nor: " Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 05/20] spi: mxic: Avoid endianness problems with 2-byte opcodes Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 06/20] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 07/20] mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 08/20] mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev D Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 09/20] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 10/20] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 11/20] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 12/20] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 13/20] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 14/20] mtd: spi-nor: sfdp: do not make invalid quad enable fatal Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 15/20] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 16/20] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 17/20] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-05-22 10:12 ` [PATCH v7 18/20] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-05-22 10:13 ` [PATCH v7 19/20] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-05-22 10:13 ` [PATCH v7 20/20] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav

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