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From: David Clear <dac2@pensando.io>
To: tudor.ambarus@microchip.com, linux-mtd@lists.infradead.org
Cc: snelson@pensando.io, David Clear <dac2@pensando.io>
Subject: [PATCH v2 1/2] mtd: spi-nor: Add support for Macronix mx66u2g45g.
Date: Mon, 20 Jul 2020 09:36:55 -0700
Message-ID: <20200720163656.38006-2-dac2@pensando.io> (raw)
In-Reply-To: <20200720163656.38006-1-dac2@pensando.io>

The Macronix mx66u2g45g is a 1.8V, 2Gbit (256MB) device that
supports x1, x2, or x4 operation.

Tested on Pensando SoC hardware with a cadence quadspi controller
via drivers/spi/spi-cadence-quadspi.c, in x2 mode at 50MHz.
  - random data write, erase, read   - verified erase operations
  - random data write, read/compare  - verified write/read operations

Signed-off-by: David Clear <dac2@pensando.io>
Acked-by: Shannon Nelson <snelson@pensando.io>
---
 drivers/mtd/spi-nor/macronix.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 0ae0815a3633..f97f3d127575 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -87,6 +87,9 @@ static const struct flash_info macronix_parts[] = {
 			      SPI_NOR_QUAD_READ) },
 	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048,
 			      SPI_NOR_QUAD_READ) },
+	{ "mx66u2g45g",	 INFO(0xc2253c, 0, 64 * 1024, 4096,
+			      SECT_4K | SPI_NOR_DUAL_READ |
+			      SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 };
 
 static void macronix_default_init(struct spi_nor *nor)
-- 
2.17.1


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Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-20 16:36 [PATCH v2 0/2] Support flash devices used on Pensando boards David Clear
2020-07-20 16:36 ` David Clear [this message]
2020-07-20 16:36 ` [PATCH v2 2/2] mtd: spi-nor: Support SPI_NOR_DUAL_READ on Micron mt25qu02g David Clear
2020-07-27 12:33 ` [PATCH v2 0/2] Support flash devices used on Pensando boards Tudor Ambarus

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