* [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
@ 2020-10-06 13:23 Bert Vermeulen
2020-10-06 15:18 ` Pratyush Yadav
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Bert Vermeulen @ 2020-10-06 13:23 UTC (permalink / raw)
To: tudor.ambarus, miquel.raynal, richard, vigneshr, linux-mtd,
linux-kernel, stable
Cc: Bert Vermeulen
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.
Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
Signed-off-by: Bert Vermeulen <bert@biot.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/core.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0369d98b2d12..a2c35ad9645c 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
/* already configured from SFDP */
} else if (nor->info->addr_width) {
nor->addr_width = nor->info->addr_width;
- } else if (nor->mtd.size > 0x1000000) {
- /* enable 4-byte addressing if the device exceeds 16MiB */
- nor->addr_width = 4;
} else {
nor->addr_width = 3;
}
+ if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+ /* enable 4-byte addressing if the device exceeds 16MiB */
+ nor->addr_width = 4;
+ }
+
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
dev_dbg(nor->dev, "address width is too large: %u\n",
nor->addr_width);
--
2.17.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-06 13:23 [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB Bert Vermeulen
@ 2020-10-06 15:18 ` Pratyush Yadav
2020-10-07 7:29 ` Vignesh Raghavendra
2020-10-06 15:33 ` Greg KH
2020-10-29 4:46 ` Vignesh Raghavendra
2 siblings, 1 reply; 6+ messages in thread
From: Pratyush Yadav @ 2020-10-06 15:18 UTC (permalink / raw)
To: Bert Vermeulen
Cc: vigneshr, tudor.ambarus, richard, linux-kernel, stable,
linux-mtd, miquel.raynal
On 06/10/20 03:23PM, Bert Vermeulen wrote:
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>
> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> /* already configured from SFDP */
> } else if (nor->info->addr_width) {
> nor->addr_width = nor->info->addr_width;
> - } else if (nor->mtd.size > 0x1000000) {
> - /* enable 4-byte addressing if the device exceeds 16MiB */
> - nor->addr_width = 4;
> } else {
> nor->addr_width = 3;
> }
>
> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
Nitpick: ^^^^^^^^^^^^^^^^^^^^^^^^ you can drop this part. But its
fine either way.
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
> + /* enable 4-byte addressing if the device exceeds 16MiB */
> + nor->addr_width = 4;
> + }
> +
> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> dev_dbg(nor->dev, "address width is too large: %u\n",
> nor->addr_width);
--
Regards,
Pratyush Yadav
Texas Instruments India
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-06 13:23 [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB Bert Vermeulen
2020-10-06 15:18 ` Pratyush Yadav
@ 2020-10-06 15:33 ` Greg KH
2020-10-29 4:46 ` Vignesh Raghavendra
2 siblings, 0 replies; 6+ messages in thread
From: Greg KH @ 2020-10-06 15:33 UTC (permalink / raw)
To: Bert Vermeulen
Cc: vigneshr, tudor.ambarus, richard, linux-kernel, stable,
linux-mtd, miquel.raynal
On Tue, Oct 06, 2020 at 03:23:46PM +0200, Bert Vermeulen wrote:
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>
> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
<formletter>
This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.
</formletter>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-06 15:18 ` Pratyush Yadav
@ 2020-10-07 7:29 ` Vignesh Raghavendra
2020-10-07 7:48 ` Pratyush Yadav
0 siblings, 1 reply; 6+ messages in thread
From: Vignesh Raghavendra @ 2020-10-07 7:29 UTC (permalink / raw)
To: Pratyush Yadav, Bert Vermeulen
Cc: richard, miquel.raynal, linux-mtd, linux-kernel, tudor.ambarus
On 10/6/20 8:48 PM, Pratyush Yadav wrote:
> On 06/10/20 03:23PM, Bert Vermeulen wrote:
>> If a flash chip has more than 16MB capacity but its BFPT reports
>> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>>
>> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
>> did get set. This fixes that check.
>>
>> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
>> Signed-off-by: Bert Vermeulen <bert@biot.com>
>> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
>> ---
>> drivers/mtd/spi-nor/core.c | 8 +++++---
>> 1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0369d98b2d12..a2c35ad9645c 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>> /* already configured from SFDP */
>> } else if (nor->info->addr_width) {
>> nor->addr_width = nor->info->addr_width;
>> - } else if (nor->mtd.size > 0x1000000) {
>> - /* enable 4-byte addressing if the device exceeds 16MiB */
>> - nor->addr_width = 4;
>> } else {
>> nor->addr_width = 3;
>> }
>>
>> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> Nitpick: ^^^^^^^^^^^^^^^^^^^^^^^^ you can drop this part. But its
> fine either way.
>
I don't think its a good idea to drop nor->addr_width == 3 check as
nor->info->addr_width is permitted to have a value > 4 (although there
is no such flash today)...
> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
>
>> + /* enable 4-byte addressing if the device exceeds 16MiB */
>> + nor->addr_width = 4;
>> + }
>> +
>> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>> dev_dbg(nor->dev, "address width is too large: %u\n",
>> nor->addr_width);
>
Regards
Vignesh
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-07 7:29 ` Vignesh Raghavendra
@ 2020-10-07 7:48 ` Pratyush Yadav
0 siblings, 0 replies; 6+ messages in thread
From: Pratyush Yadav @ 2020-10-07 7:48 UTC (permalink / raw)
To: Vignesh Raghavendra
Cc: Bert Vermeulen, tudor.ambarus, richard, linux-kernel, linux-mtd,
miquel.raynal
On 07/10/20 12:59PM, Vignesh Raghavendra wrote:
>
>
> On 10/6/20 8:48 PM, Pratyush Yadav wrote:
> > On 06/10/20 03:23PM, Bert Vermeulen wrote:
> >> If a flash chip has more than 16MB capacity but its BFPT reports
> >> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
> >>
> >> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> >> did get set. This fixes that check.
> >>
> >> Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> >> Signed-off-by: Bert Vermeulen <bert@biot.com>
> >> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> >> ---
> >> drivers/mtd/spi-nor/core.c | 8 +++++---
> >> 1 file changed, 5 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> >> index 0369d98b2d12..a2c35ad9645c 100644
> >> --- a/drivers/mtd/spi-nor/core.c
> >> +++ b/drivers/mtd/spi-nor/core.c
> >> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> >> /* already configured from SFDP */
> >> } else if (nor->info->addr_width) {
> >> nor->addr_width = nor->info->addr_width;
> >> - } else if (nor->mtd.size > 0x1000000) {
> >> - /* enable 4-byte addressing if the device exceeds 16MiB */
> >> - nor->addr_width = 4;
> >> } else {
> >> nor->addr_width = 3;
> >> }
> >>
> >> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> > Nitpick: ^^^^^^^^^^^^^^^^^^^^^^^^ you can drop this part. But its
> > fine either way.
> >
>
> I don't think its a good idea to drop nor->addr_width == 3 check as
> nor->info->addr_width is permitted to have a value > 4 (although there
> is no such flash today)...
The check below for SPI_NOR_MAX_ADDR_WIDTH will return an error when
nor->addr_width > 4, but I see your point.
> > Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
> >
> >> + /* enable 4-byte addressing if the device exceeds 16MiB */
> >> + nor->addr_width = 4;
> >> + }
> >> +
> >> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> >> dev_dbg(nor->dev, "address width is too large: %u\n",
> >> nor->addr_width);
> >
>
> Regards
> Vignesh
--
Regards,
Pratyush Yadav
Texas Instruments India
______________________________________________________
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-06 13:23 [RESEND PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB Bert Vermeulen
2020-10-06 15:18 ` Pratyush Yadav
2020-10-06 15:33 ` Greg KH
@ 2020-10-29 4:46 ` Vignesh Raghavendra
2 siblings, 0 replies; 6+ messages in thread
From: Vignesh Raghavendra @ 2020-10-29 4:46 UTC (permalink / raw)
To: miquel.raynal, linux-mtd, richard, linux-kernel, tudor.ambarus,
Bert Vermeulen
Cc: Vignesh Raghavendra
On Tue, 6 Oct 2020 15:23:46 +0200, Bert Vermeulen wrote:
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/fixes, thanks!
[1/1] mtd: spi-nor: Fix address width on flash chips > 16MB
https://git.kernel.org/mtd/c/324f78dfb4
--
Regards
Vignesh
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2020-10-06 15:18 ` Pratyush Yadav
2020-10-07 7:29 ` Vignesh Raghavendra
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