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From: Boris Brezillon <boris.brezillon@collabora.com>
To: Manuel Dipolt <mdipolt@robart.cc>
Cc: Roland Ruckerbauer <rruckerbauer@robart.cc>,
	linux-mtd <linux-mtd@lists.infradead.org>,
	maxime <maxime@cerno.tech>,
	miquel raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH v6] mtd: rawnand: sunxi: enable NAND MDMA (Master DMA) support for allwinner a23,a33,h3
Date: Mon, 12 Oct 2020 15:35:26 +0200
Message-ID: <20201012153526.4d19314b@collabora.com> (raw)
In-Reply-To: <1302710164.236549.1602496878099.JavaMail.zimbra@robart.cc>

Subject should be something like:

"mtd: rawnand: sunxi: Add MDMA support"

The commit message is here to give more details.

On Mon, 12 Oct 2020 12:01:18 +0200 (CEST)
Manuel Dipolt <mdipolt@robart.cc> wrote:

> This patch enables NAND MDMA (Master DMA) mode for the Allwinner socs A23/A33/H3. 

I was wrong, MDMA stand for MBUS DMA, not Master DMA.
		
> 
> Till now dma transfer was via ahb to and from the internal sram where the nfc io is mapped. 

It still goes through the internal SRAM IIRC, and then the DMA copies
from/to this SRAM, but we probably don't care about that. This
important thing to mention is how it differs from the normal DMA and
why we should prefer it when both are available (NAND perfs + more
bandwidth for other users of the shared DMA engine).

> Now mbus dma mode gets set for the sun8i-a23-nand-controller as default. 

s/mbus/MBUS/
s/dma/DMA/

> Mbus dma requires less configuration like defining a dedicated dma channel in the device tree.

Same here, and please wrap the commit message lines to ~72 chars.
 
> 
> yours,
> Manuel

Please drop that.

The rest of the patch looks good. Once you've address those issues you
can add

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>


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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-12 10:01 Manuel Dipolt
2020-10-12 13:35 ` Boris Brezillon [this message]

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