From: Herve Codina <herve.codina@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Herve Codina <herve.codina@bootlin.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: [PATCH v3 2/4] mtd: rawnand: Fix nand_choose_best_timings() on unsupported interface
Date: Fri, 19 Nov 2021 16:03:14 +0100 [thread overview]
Message-ID: <20211119150316.43080-3-herve.codina@bootlin.com> (raw)
In-Reply-To: <20211119150316.43080-1-herve.codina@bootlin.com>
When the NV-DDR interface is not supported by the NAND chip,
the value of onfi->nvddr_timing_modes is 0. In this case,
the best_mode variable value in nand_choose_best_nvddr_timings()
is -1. The last for-loop is skipped and the function returns an
uninitialized value.
If this returned value is 0, the nand_choose_best_sdr_timings()
is not executed and no 'best timing' are set. This leads the host
controller and the NAND chip working at default mode 0 timing
even if a better timing can be used.
Fix this uninitialized returned value.
nand_choose_best_sdr_timings() is pretty similar to
nand_choose_best_nvddr_timings(). Even if onfi->sdr_timing_modes
should never be seen as 0, nand_choose_best_sdr_timings() returned
value is fixed.
Fixes: a9ecc8c814e9 ("mtd: rawnand: Choose the best timings, NV-DDR included")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
Changes v1 to v2:
- New patch in v2 series
Changes v2 -> v3:
- Fix commit log typo
drivers/mtd/nand/raw/nand_base.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 5c6b065837ef..a130320de412 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -926,7 +926,7 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip,
struct nand_sdr_timings *spec_timings)
{
const struct nand_controller_ops *ops = chip->controller->ops;
- int best_mode = 0, mode, ret;
+ int best_mode = 0, mode, ret = -EOPNOTSUPP;
iface->type = NAND_SDR_IFACE;
@@ -977,7 +977,7 @@ int nand_choose_best_nvddr_timings(struct nand_chip *chip,
struct nand_nvddr_timings *spec_timings)
{
const struct nand_controller_ops *ops = chip->controller->ops;
- int best_mode = 0, mode, ret;
+ int best_mode = 0, mode, ret = -EOPNOTSUPP;
iface->type = NAND_NVDDR_IFACE;
--
2.31.1
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next prev parent reply other threads:[~2021-11-19 15:04 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-19 15:03 [PATCH v3 0/4] mtd: rawnand: Fixes nand infra delay setting and FSMC nand controller Herve Codina
2021-11-19 15:03 ` [PATCH v3 1/4] mtd: rawnand: Fix nand_erase_op delay Herve Codina
2021-11-19 18:38 ` Miquel Raynal
2021-11-19 15:03 ` Herve Codina [this message]
2021-11-19 18:38 ` [PATCH v3 2/4] mtd: rawnand: Fix nand_choose_best_timings() on unsupported interface Miquel Raynal
2021-11-19 15:03 ` [PATCH v3 3/4] mtd: rawnand: fsmc: Take instruction delay into account Herve Codina
2021-11-19 18:38 ` Miquel Raynal
2021-11-19 15:03 ` [PATCH v3 4/4] mtd: rawnand: fsmc: Fix timing computation Herve Codina
2021-11-19 18:38 ` Miquel Raynal
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