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From: Sudip Mukherjee <sudip.mukherjee@sifive.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>
Cc: greentime.hu@sifive.com, jude.onyenegecha@sifive.com,
	william.salmon@sifive.com, adnan.chowdhury@sifive.com,
	ben.dooks@sifive.com, linux-mtd@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Sudip Mukherjee <sudip.mukherjee@sifive.com>
Subject: [PATCH 2/3] mtd: spi-nor: add support for Quad Page Program to no_sfdp_flags
Date: Tue, 12 Jul 2022 17:38:22 +0100	[thread overview]
Message-ID: <20220712163823.428126-3-sudip.mukherjee@sifive.com> (raw)
In-Reply-To: <20220712163823.428126-1-sudip.mukherjee@sifive.com>

Some flash chips which does not have a SFDP table can support Quad
Input Page Program. Enable it in hwcaps if defined.

Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com>
---
 drivers/mtd/spi-nor/core.c | 5 +++++
 drivers/mtd/spi-nor/core.h | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index e5f7691c5bd40..e299fc8fdd3d4 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2375,6 +2375,11 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
 		spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_8_8_8_DTR],
 					SPINOR_OP_PP, SNOR_PROTO_8_8_8_DTR);
 	}
+	if (no_sfdp_flags & SPI_NOR_QUAD_PP) {
+		params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+		spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_1_4],
+					SPINOR_OP_PP_1_1_4, SNOR_PROTO_1_1_4);
+	}
 
 	/*
 	 * Sector Erase settings. Sort Erase Types in ascending order, with the
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 58fbedc94080f..dde636bdb1a7c 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -462,6 +462,7 @@ struct spi_nor_fixups {
  *   SPI_NOR_OCTAL_READ:      flash supports Octal Read.
  *   SPI_NOR_OCTAL_DTR_READ:  flash supports octal DTR Read.
  *   SPI_NOR_OCTAL_DTR_PP:    flash supports Octal DTR Page Program.
+ *   SPI_NOR_QUAD_PP:         flash supports Quad Input Page Program.
  *
  * @fixup_flags:    flags that indicate support that can be discovered via SFDP
  *                  ideally, but can not be discovered for this particular flash
@@ -509,6 +510,7 @@ struct flash_info {
 #define SPI_NOR_OCTAL_READ		BIT(5)
 #define SPI_NOR_OCTAL_DTR_READ		BIT(6)
 #define SPI_NOR_OCTAL_DTR_PP		BIT(7)
+#define SPI_NOR_QUAD_PP			BIT(8)
 
 	u8 fixup_flags;
 #define SPI_NOR_4B_OPCODES		BIT(0)
-- 
2.30.2


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  parent reply	other threads:[~2022-07-12 16:39 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-12 16:38 [PATCH 0/3] Add Quad Input Page Program to chips with no SFDP table Sudip Mukherjee
2022-07-12 16:38 ` [PATCH 1/3] mtd: spi-nor: extend no_sfdp_flags to use u16 Sudip Mukherjee
2022-07-18 16:58   ` Tudor.Ambarus
2022-07-12 16:38 ` Sudip Mukherjee [this message]
2022-07-18 17:02   ` [PATCH 2/3] mtd: spi-nor: add support for Quad Page Program to no_sfdp_flags Tudor.Ambarus
2022-07-18 18:49     ` Sudip Mukherjee
2022-07-22 10:24       ` Sudip Mukherjee
2022-07-29  7:48         ` Tudor.Ambarus
2022-07-29  8:10           ` Ben Dooks
2022-07-29 10:07             ` Tudor.Ambarus
2022-07-29  7:35       ` Tudor.Ambarus
2022-07-12 16:38 ` [PATCH 3/3] mtd: spi-nor: issi: is25wp256: Enable Quad Input Page Program Sudip Mukherjee
2022-07-18  7:39   ` Michael Walle
2022-07-18 14:56     ` Sudip Mukherjee

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