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From: Tudor Ambarus <tudor.ambarus@microchip.com>
To: <broonie@kernel.org>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>,
	<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<claudiu.beznea@microchip.com>
Cc: <linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mtd@lists.infradead.org>,
	Tudor Ambarus <tudor.ambarus@microchip.com>
Subject: [PATCH 8/8] ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency
Date: Thu, 17 Nov 2022 12:52:49 +0200	[thread overview]
Message-ID: <20221117105249.115649-9-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20221117105249.115649-1-tudor.ambarus@microchip.com>

sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.

The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.

With the increase of frequency the reads are now faster with ~33%.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 arch/arm/boot/dts/at91-sam9x60ek.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts
index 4ba52ba11dc6..6cbb4e0d9938 100644
--- a/arch/arm/boot/dts/at91-sam9x60ek.dts
+++ b/arch/arm/boot/dts/at91-sam9x60ek.dts
@@ -612,7 +612,8 @@ flash@0 {
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <104000000>;
+		spi-cs-setup-ns = /bits/ 16 <7>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
 		m25p,fast-read;
-- 
2.25.1


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  parent reply	other threads:[~2022-11-17 11:05 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-17 10:52 [PATCH 0/8] spi: Introduce spi-cs-setup-ns dt property Tudor Ambarus
2022-11-17 10:52 ` [PATCH 1/8] spi: dt-bindings: Introduce spi-cs-setup-ns property Tudor Ambarus
2022-11-18 14:14   ` Michael Walle
2022-11-18 15:30     ` Mark Brown
2023-01-02  9:37       ` Tudor Ambarus
2023-01-02 11:48         ` Michael Walle
2023-01-02 12:11           ` Tudor Ambarus
2023-01-02 13:21             ` Michael Walle
2022-11-17 10:52 ` [PATCH 2/8] spi: " Tudor Ambarus
2022-11-17 10:52 ` [PATCH 3/8] spi: Reintroduce spi_set_cs_timing() Tudor Ambarus
2022-11-17 10:52 ` [PATCH 4/8] spi: atmel-quadspi: Add support for configuring CS timing Tudor Ambarus
2022-11-17 10:52 ` [PATCH 5/8] ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency Tudor Ambarus
2023-03-28  8:51   ` Nicolas Ferre
2023-03-28  9:36     ` Tudor Ambarus
2022-11-17 10:52 ` [PATCH 6/8] ARM: dts: at91-sama5d27_som1: " Tudor Ambarus
2022-11-17 10:52 ` [PATCH 7/8] ARM: dts: at91: sama5d2_icp: " Tudor Ambarus
2022-11-17 10:52 ` Tudor Ambarus [this message]
2022-11-18 14:04 ` (subset) [PATCH 0/8] spi: Introduce spi-cs-setup-ns dt property Mark Brown

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