From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: michael@walle.cc
Cc: pratyush@kernel.org, linux-mtd@lists.infradead.org,
linux-kernel@vger.kernel.org,
Mamta Shukla <mamta.shukla@leica-geosystems.com>,
Tudor Ambarus <tudor.ambarus@linaro.org>
Subject: [PATCH v4 2/2] mtd: spi-nor: micron-st: use SFDP table for mt25qu512a
Date: Tue, 17 Oct 2023 10:47:11 +0300 [thread overview]
Message-ID: <20231017074711.12167-2-tudor.ambarus@linaro.org> (raw)
In-Reply-To: <20231017074711.12167-1-tudor.ambarus@linaro.org>
From: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Parse SFDP table to get size and functions of mt25qu512a. BFPT wrongly
advertises 16bit SR support and made the locking fail. Add a post BFPT
fixup hook to clear the 16bit SR support.
cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/jedec_id
20bb20104400
cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/manufacturer
st
cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/partname
mt25qu512a
xxd -p /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
53464450060101ff00060110300000ff84000102800000ffffffffffffff
ffffffffffffffffffffffffffffffffffffe520fbffffffff1f29eb276b
273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e
03e1ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
ffffffffffffffffffe7ffff21dcffff
md5sum /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
610efba1647e00ac6db18beb11e84c04
/sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
drivers/mtd/spi-nor/micron-st.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 756391c906e5..8920547c12bf 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -180,6 +180,18 @@ static const struct flash_info micron_nor_parts[] = {
},
};
+static int mt25qu512a_post_bfpt_fixup(struct spi_nor *nor,
+ const struct sfdp_parameter_header *bfpt_header,
+ const struct sfdp_bfpt *bfpt)
+{
+ nor->flags &= ~SNOR_F_HAS_16BIT_SR;
+ return 0;
+}
+
+static struct spi_nor_fixups mt25qu512a_fixups = {
+ .post_bfpt = mt25qu512a_post_bfpt_fixup,
+};
+
static const struct flash_info st_nor_parts[] = {
{
.name = "m25p05-nonjedec",
@@ -407,10 +419,8 @@ static const struct flash_info st_nor_parts[] = {
.name = "mt25qu512a",
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
SPI_NOR_BP3_SR_BIT6,
- .size = SZ_64M,
- .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
- .fixup_flags = SPI_NOR_4B_OPCODES,
.mfr_flags = USE_FSR,
+ .fixups = &mt25qu512a_fixups,
}, {
.id = SNOR_ID(0x20, 0xbb, 0x20),
.name = "n25q512a",
--
2.34.1
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next prev parent reply other threads:[~2023-10-17 7:47 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-17 7:47 [PATCH v4 1/2] mtd: spi-nor: micron-st: enable lock/unlock for mt25qu512a Tudor Ambarus
2023-10-17 7:47 ` Tudor Ambarus [this message]
2023-10-17 15:09 ` [PATCH v4 2/2] mtd: spi-nor: micron-st: use SFDP table " Pratyush Yadav
2023-10-18 4:50 ` [PATCH v4 1/2] mtd: spi-nor: micron-st: enable lock/unlock " Tudor Ambarus
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