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From: <Tudor.Ambarus@microchip.com>
To: <js07.lee@samsung.com>
Cc: michael@walle.cc, chenxiang66@hisilicon.com,
	linux-mtd@lists.infradead.org, vigneshr@ti.com,
	js07.lee@gmail.com
Subject: Re: [PATCH 1/3] mtd: spi-nor: reimplement block protection handling
Date: Fri, 13 Mar 2020 15:21:58 +0000	[thread overview]
Message-ID: <2264052.42fd6meZLV@192.168.1.3> (raw)
In-Reply-To: <20200304110800.20658-1-js07.lee@samsung.com>

Hi, Jungseung,

I'm going to respin your patches on top on the what will be the manufacturer 
move v2 series, https://patchwork.ozlabs.org/cover/1247794/, I want both 
included for next.

On Wednesday, March 4, 2020 1:07:58 PM EET Jungseung Lee wrote:
> The current mainline locking was restricted and could only be applied
> to flashes that has 3 block protection bit and fixed locking ratio.
> 
> A new method of normalization was reached at the end of the discussion [1].
> 
>     (1) - if bp slot is insufficient.
>     (2) - if bp slot is sufficient.
> 
>     if (bp_slots_needed > bp_slots)    // (1)
>         min_prot_length = sector_size << (bp_slots_needed - bp_slots);
>     else                               // (2)
>         min_prot_length = sector_size;
> 
> This patch changes block protection handling logic based on min_prot_length.
> It is suitable for the overall flashes with exception of some corner case

What corner case, do you refer to EON? Are you aware of other corner cases? We 
should be more precise, for easier review and understanding.

Cheers,
ta

> and easy to extend and apply for the case of 2bit or 4bit block protection.
> 
> [1] http://lists.infradead.org/pipermail/linux-mtd/2020-February/093934.html




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  parent reply	other threads:[~2020-03-13 15:22 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20200304110830epcas1p168bd480847959dc497ac5cc272fa2f80@epcas1p1.samsung.com>
2020-03-04 11:07 ` [PATCH 1/3] mtd: spi-nor: reimplement block protection handling Jungseung Lee
     [not found]   ` <CGME20200304110833epcas1p42958d6dce0081afabfdd4200258eddb8@epcas1p4.samsung.com>
2020-03-04 11:07     ` [PATCH 2/3] mtd: spi-nor: add 4bit block protection support Jungseung Lee
2020-03-13 16:24       ` Michael Walle
2020-03-17 11:00         ` Jungseung Lee
2020-03-17 11:35           ` Jungseung Lee
2020-03-17 14:52             ` Michael Walle
2020-03-18  6:01               ` Jungseung Lee
     [not found]   ` <CGME20200304110835epcas1p3a9daac6383c7ae2fa57a084d4992d5a9@epcas1p3.samsung.com>
2020-03-04 11:08     ` [PATCH 3/3] mtd: spi-nor: support lock/unlock for a few Micron chips Jungseung Lee
     [not found]   ` <3b7e6d52-e7e2-c444-1d59-5225a7260ea4@hisilicon.com>
2020-03-07  8:24     ` [PATCH 1/3] mtd: spi-nor: reimplement block protection handling Jungseung Lee
2020-03-09  7:50       ` chenxiang (M)
2020-03-09 11:20         ` Jungseung Lee
2020-03-09 11:44         ` Jungseung Lee
2020-03-14  9:58           ` chenxiang (M)
2020-03-14 13:50             ` Jungseung Lee
2020-03-16  7:21               ` chenxiang (M)
2020-03-18  7:17                 ` Jungseung Lee
2020-03-13 15:21   ` Tudor.Ambarus [this message]
2020-03-13 17:20     ` Jungseung Lee

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